diff --git a/Cargo.toml b/Cargo.toml
index 25772d0d14b14e9d45c8f095d4e481b6dd4e68bc..e817c9d6797852859bd32b751adeb9ce43456b8a 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -15,7 +15,9 @@ nb = "0.1.0"
[dependencies.stm32f413]
version = "0.2.0"
-path = "../stm32f413"
+git = "https://gitlab.henriktjader.com/pln/stm32f413"
+branch = "svd2rust0.12"
+#path = "../stm32f413"
[dependencies.cast]
default-features = false
@@ -24,7 +26,9 @@ version = "0.2.2"
[dev-dependencies.stm32f413]
features = ["rt"]
version = "0.2.0"
-path = "../stm32f413"
+git = "https://gitlab.henriktjader.com/pln/stm32f413"
+branch = "svd2rust0.12"
+#path = "../stm32f413"
[dev-dependencies.cortex-m-rt]
features = ["abort-on-panic"]
diff --git a/examples/serial-echo.rs b/examples/serial-echo.rs
new file mode 100644
index 0000000000000000000000000000000000000000..1ee5c2f7f09007c4783ca2ee4231caa2b37e08d4
--- /dev/null
+++ b/examples/serial-echo.rs
@@ -0,0 +1,37 @@
+//! Serial interface echo server
+//!
+//! In this example every received byte will be sent back to the sender. You can test this example
+//! with serial terminal emulator like `minicom`.
+#![deny(unsafe_code)]
+//#![deny(warnings)]
+#![no_std]
+
+extern crate stm32f4x_hal as f4;
+
+#[macro_use(block)]
+extern crate nb;
+
+use f4::prelude::*;
+use f4::serial::Serial;
+use f4::stm32f4x;
+
+fn main() {
+ // let p = stm32f30x::Peripherals::take().unwrap();
+
+ // let mut flash = p.FLASH.constrain();
+ // let mut rcc = p.RCC.constrain();
+ // let mut gpioa = p.GPIOA.split(&mut rcc.ahb);
+
+ // let clocks = rcc.cfgr.freeze(&mut flash.acr);
+
+ // let tx = gpioa.pa9.into_af7(&mut gpioa.moder, &mut gpioa.afrh);
+ // let rx = gpioa.pa10.into_af7(&mut gpioa.moder, &mut gpioa.afrh);
+
+ // let serial = Serial::usart1(p.USART1, (tx, rx), 115_200.bps(), clocks, &mut rcc.apb2);
+ // let (mut tx, mut rx) = serial.split();
+
+ // loop {
+ // let byte = block!(rx.read()).unwrap();
+ // block!(tx.write(byte)).ok();
+ // }
+}
diff --git a/src/lib.rs b/src/lib.rs
index b1723941924e204069246bbffcfe59a34abe0b5a..28148346fa72a1d25655f67407d4814ad0745573 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -34,7 +34,7 @@ pub mod gpio;
// pub mod i2c;
pub mod prelude;
pub mod rcc;
-// pub mod serial;
+pub mod serial;
// pub mod spi;
pub mod time;
// pub mod timer;
diff --git a/src/serial.rs b/src/serial.rs
index 761eb0c2bc3b0b0a3541dd43394fe4e67f2568c4..61fec94edd1fdaf568e4422be794ae6307dfafb7 100644
--- a/src/serial.rs
+++ b/src/serial.rs
@@ -1,17 +1,23 @@
//! Serial
+//!
+//! # USART2
+//!
+//! - TX = PA2
+//! - RX = PA3
+//! - Interrupt = USART2
use core::ptr;
use core::marker::PhantomData;
use hal::serial;
use nb;
-use stm32f30x::{USART1, USART2, USART3};
+use stm32f4x::USART2;
-use gpio::gpioa::{PA10, PA2, PA3, PA9};
-use gpio::gpiob::{PB10, PB11, PB6, PB7};
-use gpio::gpioc::{PC10, PC11, PC4, PC5};
-use gpio::gpiod::{PD5, PD6, PD8, PD9};
-use gpio::gpioe::{PE0, PE1, PE15};
+use gpio::gpioa::{PA2, PA3};
+// use gpio::gpiob::{PB10, PB11, PB6, PB7};
+// use gpio::gpioc::{PC10, PC11, PC4, PC5};
+// use gpio::gpiod::{PD5, PD6, PD8, PD9};
+// use gpio::gpioe::{PE0, PE1, PE15};
use gpio::AF7;
use rcc::{APB1, APB2, Clocks};
use time::Bps;
@@ -45,34 +51,34 @@ pub unsafe trait TxPin<USART> {}
/// RX pin - DO NOT IMPLEMENT THIS TRAIT
pub unsafe trait RxPin<USART> {}
-unsafe impl TxPin<USART1> for PA9<AF7> {}
-unsafe impl TxPin<USART1> for PB6<AF7> {}
-unsafe impl TxPin<USART1> for PC4<AF7> {}
-unsafe impl TxPin<USART1> for PE0<AF7> {}
+// unsafe impl TxPin<USART1> for PA9<AF7> {}
+// unsafe impl TxPin<USART1> for PB6<AF7> {}
+// unsafe impl TxPin<USART1> for PC4<AF7> {}
+// unsafe impl TxPin<USART1> for PE0<AF7> {}
-unsafe impl RxPin<USART1> for PA10<AF7> {}
-unsafe impl RxPin<USART1> for PB7<AF7> {}
-unsafe impl RxPin<USART1> for PC5<AF7> {}
-unsafe impl RxPin<USART1> for PE1<AF7> {}
+// unsafe impl RxPin<USART1> for PA10<AF7> {}
+// unsafe impl RxPin<USART1> for PB7<AF7> {}
+// unsafe impl RxPin<USART1> for PC5<AF7> {}
+// unsafe impl RxPin<USART1> for PE1<AF7> {}
unsafe impl TxPin<USART2> for PA2<AF7> {}
-// unsafe impl TxPin<USART2> for PA14<AF7> {}
-// unsafe impl TxPin<USART2> for PB3<AF7> {}
-unsafe impl TxPin<USART2> for PD5<AF7> {}
+// // unsafe impl TxPin<USART2> for PA14<AF7> {}
+// // unsafe impl TxPin<USART2> for PB3<AF7> {}
+// unsafe impl TxPin<USART2> for PD5<AF7> {}
unsafe impl RxPin<USART2> for PA3<AF7> {}
-// unsafe impl RxPin<USART2> for PA15<AF7> {}
-// unsafe impl RxPin<USART2> for PB4<AF7> {}
-unsafe impl RxPin<USART2> for PD6<AF7> {}
+// // unsafe impl RxPin<USART2> for PA15<AF7> {}
+// // unsafe impl RxPin<USART2> for PB4<AF7> {}
+// unsafe impl RxPin<USART2> for PD6<AF7> {}
-unsafe impl TxPin<USART3> for PB10<AF7> {}
-unsafe impl TxPin<USART3> for PC10<AF7> {}
-unsafe impl TxPin<USART3> for PD8<AF7> {}
+// unsafe impl TxPin<USART3> for PB10<AF7> {}
+// unsafe impl TxPin<USART3> for PC10<AF7> {}
+// unsafe impl TxPin<USART3> for PD8<AF7> {}
-unsafe impl RxPin<USART3> for PB11<AF7> {}
-unsafe impl RxPin<USART3> for PC11<AF7> {}
-unsafe impl RxPin<USART3> for PD9<AF7> {}
-unsafe impl RxPin<USART3> for PE15<AF7> {}
+// unsafe impl RxPin<USART3> for PB11<AF7> {}
+// unsafe impl RxPin<USART3> for PC11<AF7> {}
+// unsafe impl RxPin<USART3> for PD9<AF7> {}
+// unsafe impl RxPin<USART3> for PE15<AF7> {}
/// Serial abstraction
pub struct Serial<USART, PINS> {
@@ -109,7 +115,7 @@ macro_rules! hal {
RX: RxPin<$USARTX>,
{
// enable or reset $USARTX
- apb.enr().modify(|_, w| w.$usartXen().enabled());
+ apb.enr().modify(|_, w| w.$usartXen().set_bit());
apb.rstr().modify(|_, w| w.$usartXrst().set_bit());
apb.rstr().modify(|_, w| w.$usartXrst().clear_bit());
@@ -178,7 +184,7 @@ macro_rules! hal {
fn read(&mut self) -> nb::Result<u8, Error> {
// NOTE(unsafe) atomic read with no side effects
- let isr = unsafe { (*$USARTX::ptr()).isr.read() };
+ let isr = unsafe { (*$USARTX::ptr()).sr.read() };
Err(if isr.pe().bit_is_set() {
nb::Error::Other(Error::Parity)
@@ -191,7 +197,7 @@ macro_rules! hal {
} else if isr.rxne().bit_is_set() {
// NOTE(read_volatile) see `write_volatile` below
return Ok(unsafe {
- ptr::read_volatile(&(*$USARTX::ptr()).rdr as *const _ as *const _)
+ ptr::read_volatile(&(*$USARTX::ptr()).dr as *const _ as *const _)
});
} else {
nb::Error::WouldBlock
@@ -207,7 +213,7 @@ macro_rules! hal {
fn flush(&mut self) -> nb::Result<(), !> {
// NOTE(unsafe) atomic read with no side effects
- let isr = unsafe { (*$USARTX::ptr()).isr.read() };
+ let isr = unsafe { (*$USARTX::ptr()).sr.read() };
if isr.tc().bit_is_set() {
Ok(())
@@ -218,13 +224,13 @@ macro_rules! hal {
fn write(&mut self, byte: u8) -> nb::Result<(), !> {
// NOTE(unsafe) atomic read with no side effects
- let isr = unsafe { (*$USARTX::ptr()).isr.read() };
+ let isr = unsafe { (*$USARTX::ptr()).sr.read() };
if isr.txe().bit_is_set() {
// NOTE(unsafe) atomic write to stateless register
// NOTE(write_volatile) 8-bit write that's not possible through the svd2rust API
unsafe {
- ptr::write_volatile(&(*$USARTX::ptr()).tdr as *const _ as *mut _, byte)
+ ptr::write_volatile(&(*$USARTX::ptr()).dr as *const _ as *mut _, byte)
}
Ok(())
} else {
@@ -236,8 +242,12 @@ macro_rules! hal {
}
}
+// hal! {
+// USART1: (usart1, APB2, usart1en, usart1rst, pclk2),
+// USART2: (usart2, APB1, usart2en, usart2rst, pclk1),
+// USART3: (usart3, APB1, usart3en, usart3rst, pclk1),
+// }
+
hal! {
- USART1: (usart1, APB2, usart1en, usart1rst, pclk2),
- USART2: (usart2, APB1, usart2en, usart2rst, pclk1),
- USART3: (usart3, APB1, usart3en, usart3rst, pclk1),
+ USART2: (usart2, APB1, usart2en, uart2rst, pclk1),
}