From 0998636d591dceda5c7d72b73304ed26896cc9c5 Mon Sep 17 00:00:00 2001
From: Per Lindgren <per.lindgren@ltu.se>
Date: Sat, 3 Feb 2018 21:45:10 +0100
Subject: [PATCH] initial commit
---
.cargo/config | 11 +++++++++++
.gdbinit | 14 ++++++++++++++
.vscode/tasks.json | 19 +++++++++++++++++++
Cargo.toml | 42 ++++++++++++++++++++++++++++++++++++------
examples/hello.rs | 15 +++++++++++++++
examples/hello_itm.rs | 19 +++++++++++++++++++
memory.x | 6 ++++++
src/lib.rs | 22 +++++++++++-----------
8 files changed, 131 insertions(+), 17 deletions(-)
create mode 100644 .cargo/config
create mode 100644 .gdbinit
create mode 100644 .vscode/tasks.json
create mode 100644 examples/hello.rs
create mode 100644 examples/hello_itm.rs
create mode 100644 memory.x
diff --git a/.cargo/config b/.cargo/config
new file mode 100644
index 0000000..23e9622
--- /dev/null
+++ b/.cargo/config
@@ -0,0 +1,11 @@
+[target.thumbv7em-none-eabihf]
+runner = 'arm-none-eabi-gdb'
+rustflags = [
+ "-C", "link-arg=-Tlink.x",
+ "-C", "linker=arm-none-eabi-ld",
+ "-Z", "linker-flavor=ld",
+ "-Z", "thinlto=no",
+]
+
+[build]
+target = "thumbv7em-none-eabihf"
diff --git a/.gdbinit b/.gdbinit
new file mode 100644
index 0000000..9d1ef21
--- /dev/null
+++ b/.gdbinit
@@ -0,0 +1,14 @@
+target remote :3333
+
+monitor arm semihosting enable
+
+# send captured ITM to the file /tmp/itm.log
+# (the microcontroller SWO pin must be connected to the programmer SWO pin)
+# 16000000 must match the core clock frequency
+monitor tpiu config internal /tmp/itm.log uart off 16000000
+
+# enable ITM port 0
+monitor itm port 0 on
+
+load
+step
diff --git a/.vscode/tasks.json b/.vscode/tasks.json
new file mode 100644
index 0000000..c711af7
--- /dev/null
+++ b/.vscode/tasks.json
@@ -0,0 +1,19 @@
+{
+ // See https://go.microsoft.com/fwlink/?LinkId=733558
+ // for the documentation about the tasks.json format
+ "version": "2.0.0",
+ "tasks": [
+ {
+ "type": "shell",
+ "label": "xargo build --examples",
+ "command": "xargo build --examples",
+ "problemMatcher": [
+ "$rustc"
+ ],
+ "group": {
+ "kind": "build",
+ "isDefault": true
+ }
+ },
+ ]
+}
\ No newline at end of file
diff --git a/Cargo.toml b/Cargo.toml
index 8d3bbd5..40354a4 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -1,22 +1,52 @@
[package]
-authors = ["Jorge Aparicio <jorge@japaric.io>"]
+authors = ["Per Lindgren <per.lindgren@ltu.se> Jorge Aparicio <jorge@japaric.io>"]
categories = ["embedded", "hardware-support", "no-std"]
-description = "HAL for the STM32F30x family of microcontrollers"
+description = "HAL for the STM32F4xx family of microcontrollers"
keywords = ["arm", "cortex-m", "stm32", "hal"]
license = "MIT OR Apache-2.0"
-name = "stm32f30x-hal"
-repository = "https://github.com/japaric/stm32f30x-hal"
+name = "stm32f4xx-hal"
+#repository = "https://github.com/japaric/stm32f30x-hal"
version = "0.1.1"
[dependencies]
cortex-m = "0.4.0"
embedded-hal = "0.1.0"
nb = "0.1.0"
-stm32f30x = "0.6.0"
+
+[dependencies.stm32f413]
+version = "0.2.0"
+path = "../stm32f413"
[dependencies.cast]
default-features = false
version = "0.2.2"
+[dev-dependencies.stm32f413]
+features = ["rt"]
+version = "0.2.0"
+path = "../stm32f413"
+
+[dev-dependencies.cortex-m-rt]
+features = ["abort-on-panic"]
+version = "0.3.12"
+
+[dev-dependencies]
+cortex-m-semihosting = "0.2.0"
+cortex-m-rtfm = "0.3.1"
+
+[dev-dependencies.cortex-m-debug]
+git = "https://gitlab.henriktjader.com/pln/cortex-m-debug.git"
+version = "0.1.2"
+branch = "cortex-m-4"
+#path = "../cortex-m-debug"
+
[features]
-rt = ["stm32f30x/rt"]
\ No newline at end of file
+rt = ["stm32f413/rt"]
+
+[profile.dev]
+codegen-units = 1
+incremental = false
+
+[profile.release]
+debug = true
+lto = true
\ No newline at end of file
diff --git a/examples/hello.rs b/examples/hello.rs
new file mode 100644
index 0000000..9c8b5ac
--- /dev/null
+++ b/examples/hello.rs
@@ -0,0 +1,15 @@
+//! Prints "Hello, world" on the OpenOCD console
+#![deny(unsafe_code)]
+#![deny(warnings)]
+#![no_std]
+
+extern crate cortex_m_semihosting as semihosting;
+extern crate stm32f4xx_hal;
+
+use core::fmt::Write;
+
+use semihosting::hio;
+
+fn main() {
+ writeln!(hio::hstdout().unwrap(), "Hello, world!").unwrap();
+}
diff --git a/examples/hello_itm.rs b/examples/hello_itm.rs
new file mode 100644
index 0000000..d25131a
--- /dev/null
+++ b/examples/hello_itm.rs
@@ -0,0 +1,19 @@
+//! Prints "Hello, world" on the ITM console
+#![deny(unsafe_code)]
+#![deny(warnings)]
+#![no_std]
+
+//extern crate cortex_m_semihosting as semihosting;
+extern crate stm32f4xx_hal;
+
+// Convenient tracing over semihosting and ITM
+#[macro_use]
+extern crate cortex_m_debug;
+
+fn main() {
+ ip!("ITM: Hello ");
+ ipln!("World! for the {} time", 50);
+
+ sp!("Semihosting: Hello ");
+ spln!("World! for the {} time", 50);
+}
diff --git a/memory.x b/memory.x
new file mode 100644
index 0000000..139422c
--- /dev/null
+++ b/memory.x
@@ -0,0 +1,6 @@
+/* STM32F401re */
+MEMORY
+{
+ FLASH : ORIGIN = 0x08000000, LENGTH = 512K
+ RAM : ORIGIN = 0x20000000, LENGTH = 96K
+}
diff --git a/src/lib.rs b/src/lib.rs
index bb78f62..ebe994d 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -28,15 +28,15 @@ extern crate cast;
extern crate cortex_m;
extern crate embedded_hal as hal;
extern crate nb;
-pub extern crate stm32f30x;
+pub extern crate stm32f413;
-pub mod delay;
-pub mod flash;
-pub mod gpio;
-pub mod i2c;
-pub mod prelude;
-pub mod rcc;
-pub mod serial;
-pub mod spi;
-pub mod time;
-pub mod timer;
+// pub mod delay;
+// pub mod flash;
+// pub mod gpio;
+// pub mod i2c;
+// pub mod prelude;
+// pub mod rcc;
+// pub mod serial;
+// pub mod spi;
+// pub mod time;
+// pub mod timer;
--
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