From 5a19367eef2d49dbe027cf00decfa5e8fe1ae30a Mon Sep 17 00:00:00 2001
From: Per Lindgren <per.lindgren@ltu.se>
Date: Wed, 21 Oct 2020 18:18:08 +0200
Subject: [PATCH] async POC, SeqCst is sufficient
---
qemu/examples/spawn3.rs | 15 +++++++++++++--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/qemu/examples/spawn3.rs b/qemu/examples/spawn3.rs
index 54ea4da..48c65ec 100644
--- a/qemu/examples/spawn3.rs
+++ b/qemu/examples/spawn3.rs
@@ -14,8 +14,8 @@ use core::pin::Pin;
// use core::ptr;
// use core::ptr::NonNull;
// use core::sync::atomic::{AtomicPtr, AtomicU32, Ordering};
+use core::sync::atomic::{compiler_fence, Ordering};
use core::task::{Context, Poll, RawWaker, RawWakerVTable, Waker};
-
use cortex_m_semihosting::{debug, hprintln};
use panic_semihosting as _;
@@ -86,7 +86,18 @@ mod app {
#[task(resources = [counter], priority = 2)]
fn rt_task(cx: rt_task::Context) {
- hprintln!("counter {}", cx.resources.counter).ok();
+ //hprintln!("counter {}", cx.resources.counter).ok();
+ // compiler_fence(Ordering::SeqCst);
+ *cx.resources.counter += 1;
+ compiler_fence(Ordering::SeqCst);
+ *cx.resources.counter += 1;
+ }
+
+ #[task(binds = UART1, resources = [counter], priority = 2)]
+ fn uart1(cx: uart1::Context) {
+ *cx.resources.counter += 1;
+ // compiler_fence(Ordering::SeqCst);
+ *cx.resources.counter += 1;
}
// RTIC requires that unused interrupts are declared in an extern block when
--
GitLab