diff --git a/.gdbinit b/.gdbinit
new file mode 100644
index 0000000000000000000000000000000000000000..098ff6f90cac5691f155e0dfba1ce4e87be3f7f3
--- /dev/null
+++ b/.gdbinit
@@ -0,0 +1,18 @@
+target remote :3333
+
+monitor arm semihosting enable
+
+# # send captured ITM to the file itm.fifo
+# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
+# # 8000000 must match the core clock frequency
+# monitor tpiu config internal itm.fifo uart off 8000000
+
+# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
+# # 2000000 is the frequency of the SWO pin
+# monitor tpiu config external uart off 8000000 2000000
+
+# # enable ITM port 0
+# monitor itm port 0 on
+
+load
+step
diff --git a/memory.x b/memory.x
new file mode 100644
index 0000000000000000000000000000000000000000..74e34b86e1a73e6f5d1f4e7449d4a0e5ed781920
--- /dev/null
+++ b/memory.x
@@ -0,0 +1,5 @@
+MEMORY
+{
+  FLASH : ORIGIN = 0x08000000, LENGTH = 64K
+  RAM : ORIGIN = 0x20000000, LENGTH = 20K
+}
\ No newline at end of file