diff --git a/.gdbinit b/.gdbinit
index 611fa7e9ea8835f160e005556b37b81c822b54a0..3cb6cdc686747ca47abe57f6297a201b67c587b0 100644
--- a/.gdbinit
+++ b/.gdbinit
@@ -1,19 +1,20 @@
 target remote :3333
 
 monitor reset halt
-monitor arm semihosting enable
+
+# # Enable semihosting
+#monitor arm semihosting enable
 
 # # send captured ITM to the file itm.fifo
 # # (the microcontroller SWO pin must be connected to the programmer SWO pin)
 # # 8000000 must match the core clock frequency
-monitor tpiu config internal itm.fifo uart off 16000000
+#monitor tpiu config internal itm.fifo uart off 16000000
 
 # # OR: make the microcontroller SWO pin output compatible with UART (8N1)
 # # 2000000 is the frequency of the SWO pin
 # monitor tpiu config external uart off 8000000 2000000
 
 # # enable ITM port 0
-monitor itm port 0 on
+#monitor itm port 0 on
 
 load
-# step