diff --git a/murata/CMWX1ZZABZ-091-cache.lib b/murata/CMWX1ZZABZ-091-cache.lib
index aea5c64e915945d4cb6eac1e65bdb296c9b8c643..0c0e9df9ab4112d183569149f49574cb4d35355e 100644
--- a/murata/CMWX1ZZABZ-091-cache.lib
+++ b/murata/CMWX1ZZABZ-091-cache.lib
@@ -1,6 +1,117 @@
EESchema-LIBRARY Version 2.4
#encoding utf-8
#
+# CMWX1ZZABZ-091-rescue_CMWX1ZZABZ-091-RF_Module
+#
+DEF CMWX1ZZABZ-091-rescue_CMWX1ZZABZ-091-RF_Module U 0 20 Y Y 1 F N
+F0 "U" -700 1450 50 H V C CNN
+F1 "CMWX1ZZABZ-091-rescue_CMWX1ZZABZ-091-RF_Module" 650 1450 50 H V C CNN
+F2 "RF_Module:CMWX1ZZABZ" 0 0 50 H I C CNN
+F3 "" 2450 -1500 50 H I C CNN
+$FPLIST
+ CMWX1ZZABZ*
+$ENDFPLIST
+DRAW
+S -800 1400 800 -1400 0 1 10 f
+X PA12/USB_DP 1 -900 0 100 R 50 50 1 1 B
+X SX1276_DIO4 10 900 -1000 100 L 50 50 1 1 B
+X DBG_SX1276_DIO5 11 900 -1100 100 L 50 50 1 1 B
+X DBG_SX1276_DIO1 12 900 -700 100 L 50 50 1 1 B
+X DBG_SX1276_DIO0 13 900 -600 100 L 50 50 1 1 B
+X PB15/SPI2_MOSI 14 900 0 100 L 50 50 1 1 B
+X PB14/SPI2_MISO 15 900 100 100 L 50 50 1 1 B
+X PB13/SPI2_SCK 16 900 200 100 L 50 50 1 1 B
+X PB12/SPI2_NSS 17 900 300 100 L 50 50 1 1 B
+X PA10/USART1_RX 18 -900 200 100 R 50 50 1 1 B
+X PA9/USART1_TX 19 -900 300 100 R 50 50 1 1 B
+X PA11/USB_DM 2 -900 100 100 R 50 50 1 1 B
+X PA8/MCO 20 -900 400 100 R 50 50 1 1 B
+X PA5/ADC5/DAC2 21 -900 500 100 R 50 50 1 1 B
+X PA4/ADC4/DAC1 22 -900 600 100 R 50 50 1 1 B
+X PA3/ADC3 23 -900 700 100 R 50 50 1 1 B
+X PA2/ADC2 24 -900 800 100 R 50 50 1 1 B
+X GND 25 0 -1500 100 U 50 50 1 1 P N
+X ANT 26 900 -1300 100 L 50 50 1 1 P
+X GND 27 0 -1500 100 U 50 50 1 1 P N
+X DBG_CRF1 28 900 -200 100 L 50 50 1 1 P
+X DBG_CRF3 29 900 -400 100 L 50 50 1 1 P
+X GND 3 0 -1500 100 U 50 50 1 1 W
+X DGB_CRF2 30 900 -300 100 L 50 50 1 1 P
+X ~STSAFE_RST 31 -900 -1100 100 R 50 50 1 1 P
+X VREF+ 32 100 1500 100 D 50 50 1 1 W
+X PA0/WKUP1 33 -900 900 100 R 50 50 1 1 B
+X ~MCU_RST 34 -900 -400 100 R 50 50 1 1 I
+X PB8/I2C1_SCL 35 900 500 100 L 50 50 1 1 B
+X PB9/I2C1_SDA 36 900 400 100 L 50 50 1 1 B
+X PB2/LPTIM1_OUT 37 900 900 100 L 50 50 1 1 B
+X PB7/LPTIM1_IN2 38 900 600 100 L 50 50 1 1 B
+X PB6/LPTIM1_ETR 39 900 700 100 L 50 50 1 1 B
+X VDD_USB 4 -200 1500 100 D 50 50 1 1 W
+X PB5/LPTIM1_IN1 40 900 800 100 L 50 50 1 1 B
+X PA13/SWDIO 41 -900 -100 100 R 50 50 1 1 B
+X PA14/SWCLK 42 -900 -200 100 R 50 50 1 1 B
+X BOOT0 43 -900 -1300 100 R 50 50 1 1 I
+X GND 44 0 -1500 100 U 50 50 1 1 P N
+X PH1/OSC_OUT 45 -900 -900 100 R 50 50 1 1 B
+X PH0/OSC_IN 46 -900 -800 100 R 50 50 1 1 B
+X TCXO_OUT 47 -900 -600 100 R 50 50 1 1 O
+X VDD_TCXO 48 200 1500 100 D 50 50 1 1 W
+X GND 49 0 -1500 100 U 50 50 1 1 P N
+X VDD_MCU 5 -100 1500 100 D 50 50 1 1 W
+X GND 50 0 -1500 100 U 50 50 1 1 P N
+X GND 51 0 -1500 100 U 50 50 1 1 P N
+X GND 52 0 -1500 100 U 50 50 1 1 P N
+X GND 53 0 -1500 100 U 50 50 1 1 P N
+X GND 54 0 -1500 100 U 50 50 1 1 P N
+X GND 55 0 -1500 100 U 50 50 1 1 P N
+X GND 56 0 -1500 100 U 50 50 1 1 P N
+X GND 57 0 -1500 100 U 50 50 1 1 P N
+X VDD_RF 6 0 1500 100 D 50 50 1 1 W
+X GND 7 0 -1500 100 U 50 50 1 1 P N
+X DBG_SX1276_DIO2 8 900 -800 100 L 50 50 1 1 B
+X DBG_SX1276_DI03 9 900 -900 100 L 50 50 1 1 B
+ENDDRAW
+ENDDEF
+#
+# CMWX1ZZABZ-091-rescue_U.FL-R-SMT(01)-U.FL-R-SMT_01_
+#
+DEF CMWX1ZZABZ-091-rescue_U.FL-R-SMT(01)-U.FL-R-SMT_01_ J 0 40 Y Y 1 L N
+F0 "J" -150 160 50 H V L BNN
+F1 "CMWX1ZZABZ-091-rescue_U.FL-R-SMT(01)-U.FL-R-SMT_01_" -170 -220 50 H V L BNN
+F2 "HRS_U.FL-R-SMT(01)" 0 0 50 H I L BNN
+F3 "U.FL Series 6 Ghz 50 Ohm Ultra-small SMT Coaxial Cable Receptacle" 0 0 50 H I L BNN
+F4 "Hirose" 0 0 50 H I L BNN
+F5 "Unavailable" 0 0 50 H I L BNN
+F6 "None" 0 0 50 H I L BNN
+F7 "None" 0 0 50 H I L BNN
+F8 "U.FL-R-SMT_01_" 0 0 50 H I L BNN
+DRAW
+C 0 -100 10 0 0 10 N
+C 0 100 40 0 0 10 N
+P 2 0 0 10 -300 -100 0 -100 N
+P 2 0 0 10 -300 100 100 100 N
+P 2 0 0 10 -40 60 0 60 N
+P 2 0 0 10 -30 -130 -50 -160 N
+P 2 0 0 10 0 -130 -30 -130 N
+P 2 0 0 10 0 -130 -20 -160 N
+P 2 0 0 10 0 -130 30 -130 N
+P 2 0 0 10 0 -100 0 -130 N
+P 2 0 0 10 0 60 0 -100 N
+P 2 0 0 10 0 60 40 60 N
+P 2 0 0 10 30 -130 10 -160 N
+P 2 0 0 10 100 -100 0 -100 N
+P 2 0 0 10 102 67 169 98 N
+P 2 0 0 10 102 134 102 67 N
+P 2 0 0 10 106 -134 173 -102 N
+P 2 0 0 10 106 -67 106 -134 N
+P 2 0 0 10 169 98 106 134 N
+P 2 0 0 10 173 -102 110 -67 N
+X GND 1 -400 -100 100 R 40 40 0 0 P
+X GND 2 -400 -100 100 R 40 40 0 0 P
+X SIG 3 -400 100 100 R 40 40 0 0 P
+ENDDRAW
+ENDDEF
+#
# Connector_Conn_01x02_Male
#
DEF Connector_Conn_01x02_Male J 0 40 Y N 1 F N
@@ -131,6 +242,31 @@ X Pin_6 6 200 -300 150 L 50 50 1 1 P
ENDDRAW
ENDDEF
#
+# Connector_Conn_Coaxial
+#
+DEF Connector_Conn_Coaxial J 0 40 Y N 1 F N
+F0 "J" 10 120 50 H V C CNN
+F1 "Connector_Conn_Coaxial" 115 0 50 V V C CNN
+F2 "" 0 0 50 H I C CNN
+F3 "" 0 0 50 H I C CNN
+$FPLIST
+ *BNC*
+ *SMA*
+ *SMB*
+ *SMC*
+ *Cinch*
+$ENDFPLIST
+DRAW
+A -2 0 71 1636 0 0 1 10 N -70 20 70 0
+A -1 0 71 0 -1638 0 1 10 N 70 0 -70 -20
+C 0 0 20 0 1 8 N
+P 2 0 1 0 -100 0 -20 0 N
+P 2 0 1 0 0 -100 0 -70 N
+X In 1 -200 0 100 R 50 50 1 1 P
+X Ext 2 0 -200 100 U 50 50 1 1 P
+ENDDRAW
+ENDDEF
+#
# Connector_USB_B_Micro
#
DEF Connector_USB_B_Micro J 0 40 Y Y 1 F N
@@ -196,8 +332,11 @@ $FPLIST
CP_*
$ENDFPLIST
DRAW
-S -90 20 90 40 0 1 0 N
+S -90 20 -90 40 0 1 0 N
+S -90 20 90 20 0 1 0 N
S 90 -20 -90 -40 0 1 0 F
+S 90 40 -90 40 0 1 0 N
+S 90 40 90 20 0 1 0 N
P 2 0 1 0 -70 90 -30 90 N
P 2 0 1 0 -50 110 -50 70 N
X ~ 1 0 150 110 D 50 50 1 1 P
@@ -245,79 +384,6 @@ X ~ 2 0 -150 50 U 50 50 1 1 P
ENDDRAW
ENDDEF
#
-# RF_Module_CMWX1ZZABZ-091
-#
-DEF RF_Module_CMWX1ZZABZ-091 U 0 20 Y Y 1 F N
-F0 "U" -700 1450 50 H V C CNN
-F1 "RF_Module_CMWX1ZZABZ-091" 650 1450 50 H V C CNN
-F2 "RF_Module:CMWX1ZZABZ" 0 0 50 H I C CNN
-F3 "" 2450 -1500 50 H I C CNN
-ALIAS CMWX1ZZABZ-091
-$FPLIST
- CMWX1ZZABZ*
-$ENDFPLIST
-DRAW
-S -800 1400 800 -1400 0 1 10 f
-X PA12/USB_DP 1 -900 0 100 R 50 50 1 1 B
-X SX1276_DIO4 10 900 -1000 100 L 50 50 1 1 B
-X DBG_SX1276_DIO5 11 900 -1100 100 L 50 50 1 1 B
-X DBG_SX1276_DIO1 12 900 -700 100 L 50 50 1 1 B
-X DBG_SX1276_DIO0 13 900 -600 100 L 50 50 1 1 B
-X PB15/SPI2_MOSI 14 900 0 100 L 50 50 1 1 B
-X PB14/SPI2_MISO 15 900 100 100 L 50 50 1 1 B
-X PB13/SPI2_SCK 16 900 200 100 L 50 50 1 1 B
-X PB12/SPI2_NSS 17 900 300 100 L 50 50 1 1 B
-X PA10/USART1_RX 18 -900 200 100 R 50 50 1 1 B
-X PA9/USART1_TX 19 -900 300 100 R 50 50 1 1 B
-X PA11/USB_DM 2 -900 100 100 R 50 50 1 1 B
-X PA8/MCO 20 -900 400 100 R 50 50 1 1 B
-X PA5/ADC5/DAC2 21 -900 500 100 R 50 50 1 1 B
-X PA4/ADC4/DAC1 22 -900 600 100 R 50 50 1 1 B
-X PA3/ADC3 23 -900 700 100 R 50 50 1 1 B
-X PA2/ADC2 24 -900 800 100 R 50 50 1 1 B
-X GND 25 0 -1500 100 U 50 50 1 1 P N
-X ANT 26 900 -1300 100 L 50 50 1 1 P
-X GND 27 0 -1500 100 U 50 50 1 1 P N
-X DBG_CRF1 28 900 -200 100 L 50 50 1 1 P
-X DBG_CRF3 29 900 -400 100 L 50 50 1 1 P
-X GND 3 0 -1500 100 U 50 50 1 1 W
-X DGB_CRF2 30 900 -300 100 L 50 50 1 1 P
-X ~STSAFE_RST 31 -900 -1100 100 R 50 50 1 1 P
-X VREF+ 32 100 1500 100 D 50 50 1 1 W
-X PA0/WKUP1 33 -900 900 100 R 50 50 1 1 B
-X ~MCU_RST 34 -900 -400 100 R 50 50 1 1 I
-X PB8/I2C1_SCL 35 900 500 100 L 50 50 1 1 B
-X PB9/I2C1_SDA 36 900 400 100 L 50 50 1 1 B
-X PB2/LPTIM1_OUT 37 900 900 100 L 50 50 1 1 B
-X PB7/LPTIM1_IN2 38 900 600 100 L 50 50 1 1 B
-X PB6/LPTIM1_ETR 39 900 700 100 L 50 50 1 1 B
-X VDD_USB 4 -200 1500 100 D 50 50 1 1 W
-X PB5/LPTIM1_IN1 40 900 800 100 L 50 50 1 1 B
-X PA13/SWDIO 41 -900 -100 100 R 50 50 1 1 B
-X PA14/SWCLK 42 -900 -200 100 R 50 50 1 1 B
-X BOOT0 43 -900 -1300 100 R 50 50 1 1 I
-X GND 44 0 -1500 100 U 50 50 1 1 P N
-X PH1/OSC_OUT 45 -900 -900 100 R 50 50 1 1 B
-X PH0/OSC_IN 46 -900 -800 100 R 50 50 1 1 B
-X TCXO_OUT 47 -900 -600 100 R 50 50 1 1 O
-X VDD_TCXO 48 200 1500 100 D 50 50 1 1 W
-X GND 49 0 -1500 100 U 50 50 1 1 P N
-X VDD_MCU 5 -100 1500 100 D 50 50 1 1 W
-X GND 50 0 -1500 100 U 50 50 1 1 P N
-X GND 51 0 -1500 100 U 50 50 1 1 P N
-X GND 52 0 -1500 100 U 50 50 1 1 P N
-X GND 53 0 -1500 100 U 50 50 1 1 P N
-X GND 54 0 -1500 100 U 50 50 1 1 P N
-X GND 55 0 -1500 100 U 50 50 1 1 P N
-X GND 56 0 -1500 100 U 50 50 1 1 P N
-X GND 57 0 -1500 100 U 50 50 1 1 P N
-X VDD_RF 6 0 1500 100 D 50 50 1 1 W
-X GND 7 0 -1500 100 U 50 50 1 1 P N
-X DBG_SX1276_DIO2 8 900 -800 100 L 50 50 1 1 B
-X DBG_SX1276_DI03 9 900 -900 100 L 50 50 1 1 B
-ENDDRAW
-ENDDEF
-#
# Regulator_Linear_LM1117-3.3
#
DEF Regulator_Linear_LM1117-3.3 U 0 10 Y Y 1 F N
@@ -357,45 +423,6 @@ X 2 2 200 0 100 L 50 50 0 1 P
ENDDRAW
ENDDEF
#
-# U.FL-R-SMT_01__U.FL-R-SMT(01)
-#
-DEF U.FL-R-SMT_01__U.FL-R-SMT(01) J 0 40 Y Y 1 L N
-F0 "J" -150 160 50 H V L BNN
-F1 "U.FL-R-SMT_01__U.FL-R-SMT(01)" -170 -220 50 H V L BNN
-F2 "HRS_U.FL-R-SMT(01)" 0 0 50 H I L BNN
-F3 "U.FL Series 6 Ghz 50 Ohm Ultra-small SMT Coaxial Cable Receptacle" 0 0 50 H I L BNN
-F4 "Hirose" 0 0 50 H I L BNN
-F5 "Unavailable" 0 0 50 H I L BNN
-F6 "None" 0 0 50 H I L BNN
-F7 "None" 0 0 50 H I L BNN
-F8 "U.FL-R-SMT_01_" 0 0 50 H I L BNN
-DRAW
-C 0 -100 10 0 0 10 N
-C 0 100 40 0 0 10 N
-P 2 0 0 10 -300 -100 0 -100 N
-P 2 0 0 10 -300 100 100 100 N
-P 2 0 0 10 -40 60 0 60 N
-P 2 0 0 10 -30 -130 -50 -160 N
-P 2 0 0 10 0 -130 -30 -130 N
-P 2 0 0 10 0 -130 -20 -160 N
-P 2 0 0 10 0 -130 30 -130 N
-P 2 0 0 10 0 -100 0 -130 N
-P 2 0 0 10 0 60 0 -100 N
-P 2 0 0 10 0 60 40 60 N
-P 2 0 0 10 30 -130 10 -160 N
-P 2 0 0 10 100 -100 0 -100 N
-P 2 0 0 10 102 67 169 98 N
-P 2 0 0 10 102 134 102 67 N
-P 2 0 0 10 106 -134 173 -102 N
-P 2 0 0 10 106 -67 106 -134 N
-P 2 0 0 10 169 98 106 134 N
-P 2 0 0 10 173 -102 110 -67 N
-X GND 1 -400 -100 100 R 40 40 0 0 P
-X GND 2 -400 -100 100 R 40 40 0 0 P
-X SIG 3 -400 100 100 R 40 40 0 0 P
-ENDDRAW
-ENDDEF
-#
# power_+3V3
#
DEF power_+3V3 #PWR 0 0 Y Y 1 F P
diff --git a/murata/CMWX1ZZABZ-091.kicad_pcb b/murata/CMWX1ZZABZ-091.kicad_pcb
index d68638e78b556161120b05835c02ab6c13921454..aef10687538aad51b3108149d8a883c35201d6f6 100644
--- a/murata/CMWX1ZZABZ-091.kicad_pcb
+++ b/murata/CMWX1ZZABZ-091.kicad_pcb
@@ -1,11 +1,11 @@
-(kicad_pcb (version 20171130) (host pcbnew 5.1.5)
+(kicad_pcb (version 20171130) (host pcbnew "(5.0.2)-1")
(general
(thickness 1.6)
(drawings 4)
- (tracks 130)
+ (tracks 308)
(zones 0)
- (modules 31)
+ (modules 32)
(nets 47)
)
@@ -39,6 +39,8 @@
(zone_clearance 0.508)
(zone_45_only no)
(trace_min 0.2)
+ (segment_width 0.2)
+ (edge_width 0.05)
(via_size 0.8)
(via_drill 0.4)
(via_min_size 0.4)
@@ -48,19 +50,17 @@
(uvias_allowed no)
(uvia_min_size 0.2)
(uvia_min_drill 0.1)
- (edge_width 0.05)
- (segment_width 0.2)
(pcb_text_width 0.3)
(pcb_text_size 1.5 1.5)
(mod_edge_width 0.12)
(mod_text_size 1 1)
(mod_text_width 0.15)
- (pad_size 1.524 1.524)
- (pad_drill 0.762)
+ (pad_size 1.1 5.08)
+ (pad_drill 0)
(pad_to_mask_clearance 0.051)
(solder_mask_min_width 0.25)
(aux_axis_origin 0 0)
- (visible_elements FFFFFF7F)
+ (visible_elements 7FFFFFFF)
(pcbplotparams
(layerselection 0x010fc_ffffffff)
(usegerberextensions false)
@@ -107,36 +107,36 @@
(net 14 /USART1_TX)
(net 15 /PA8)
(net 16 /VDD_TCXO)
- (net 17 "Net-(J6-Pad1)")
- (net 18 "Net-(J6-Pad2)")
- (net 19 "Net-(J6-Pad3)")
- (net 20 "Net-(J6-Pad4)")
- (net 21 "Net-(J6-Pad5)")
- (net 22 "Net-(J6-Pad6)")
- (net 23 "Net-(J7-Pad4)")
- (net 24 "Net-(J7-Pad3)")
- (net 25 "Net-(J7-Pad2)")
- (net 26 "Net-(J7-Pad1)")
- (net 27 /PA2)
- (net 28 /PA3)
- (net 29 /PA4)
- (net 30 /PA5)
- (net 31 "Net-(R1-Pad1)")
- (net 32 "Net-(R3-Pad1)")
- (net 33 "Net-(U2-Pad46)")
- (net 34 "Net-(U2-Pad45)")
- (net 35 "Net-(U2-Pad31)")
- (net 36 "Net-(U2-Pad30)")
- (net 37 "Net-(U2-Pad29)")
- (net 38 "Net-(U2-Pad28)")
- (net 39 "Net-(U2-Pad13)")
- (net 40 "Net-(U2-Pad12)")
- (net 41 "Net-(U2-Pad11)")
- (net 42 "Net-(U2-Pad10)")
- (net 43 "Net-(U2-Pad9)")
- (net 44 "Net-(U2-Pad8)")
- (net 45 /USB_P)
- (net 46 /USB_N)
+ (net 17 "Net-(J7-Pad4)")
+ (net 18 "Net-(J7-Pad3)")
+ (net 19 "Net-(J7-Pad2)")
+ (net 20 "Net-(J7-Pad1)")
+ (net 21 /PA2)
+ (net 22 /PA3)
+ (net 23 /PA4)
+ (net 24 /PA5)
+ (net 25 "Net-(R1-Pad1)")
+ (net 26 "Net-(R3-Pad1)")
+ (net 27 "Net-(U2-Pad46)")
+ (net 28 "Net-(U2-Pad45)")
+ (net 29 "Net-(U2-Pad31)")
+ (net 30 "Net-(U2-Pad30)")
+ (net 31 "Net-(U2-Pad29)")
+ (net 32 "Net-(U2-Pad28)")
+ (net 33 "Net-(U2-Pad13)")
+ (net 34 "Net-(U2-Pad12)")
+ (net 35 "Net-(U2-Pad11)")
+ (net 36 "Net-(U2-Pad10)")
+ (net 37 "Net-(U2-Pad9)")
+ (net 38 "Net-(U2-Pad8)")
+ (net 39 /USB_P)
+ (net 40 /USB_N)
+ (net 41 /PB8)
+ (net 42 /PB9)
+ (net 43 /PB2)
+ (net 44 /PB7)
+ (net 45 /PB6)
+ (net 46 /PB5)
(net_class Default "This is the default net class."
(clearance 0.2)
@@ -153,6 +153,12 @@
(add_net /PA4)
(add_net /PA5)
(add_net /PA8)
+ (add_net /PB2)
+ (add_net /PB5)
+ (add_net /PB6)
+ (add_net /PB7)
+ (add_net /PB8)
+ (add_net /PB9)
(add_net /SWCLK)
(add_net /SWDIO)
(add_net /SWO)
@@ -167,12 +173,6 @@
(add_net "Net-(D1-Pad2)")
(add_net "Net-(D2-Pad2)")
(add_net "Net-(J1-Pad4)")
- (add_net "Net-(J6-Pad1)")
- (add_net "Net-(J6-Pad2)")
- (add_net "Net-(J6-Pad3)")
- (add_net "Net-(J6-Pad4)")
- (add_net "Net-(J6-Pad5)")
- (add_net "Net-(J6-Pad6)")
(add_net "Net-(J7-Pad1)")
(add_net "Net-(J7-Pad2)")
(add_net "Net-(J7-Pad3)")
@@ -366,18 +366,18 @@
)
(module Capacitors_SMD:C_0805_HandSoldering (layer F.Cu) (tedit 58AA84A8) (tstamp 5DF3A7E1)
- (at 166.75 71.5 180)
+ (at 153.8 68.25 90)
(descr "Capacitor SMD 0805, hand soldering")
(tags "capacitor 0805")
(path /5DF3AC6E)
(attr smd)
- (fp_text reference C5 (at 0 -1.75) (layer F.SilkS)
+ (fp_text reference C5 (at 0 -1.75 -90) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 0.1uF (at 0 1.75) (layer F.Fab)
+ (fp_text value 0.1uF (at 0 1.75 -90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 0 -1.75) (layer F.Fab)
+ (fp_text user %R (at 0 -1.75 -90) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
@@ -390,9 +390,9 @@
(fp_line (start -2.25 -0.88) (end -2.25 0.87) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.25 0.87) (end 2.25 -0.88) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.25 0.87) (end -2.25 0.87) (layer F.CrtYd) (width 0.05))
- (pad 1 smd rect (at -1.25 0 180) (size 1.5 1.25) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at -1.25 0 90) (size 1.5 1.25) (layers F.Cu F.Paste F.Mask)
(net 4 /NRST))
- (pad 2 smd rect (at 1.25 0 180) (size 1.5 1.25) (layers F.Cu F.Paste F.Mask)
+ (pad 2 smd rect (at 1.25 0 90) (size 1.5 1.25) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(model Capacitors_SMD.3dshapes/C_0805.wrl
(at (xyz 0 0 0))
@@ -726,15 +726,15 @@
)
(module LEDs:LED_0805_HandSoldering (layer F.Cu) (tedit 595FCA25) (tstamp 5DF3DFA2)
- (at 154.65 66)
+ (at 159.95 77.8 180)
(descr "Resistor SMD 0805, hand soldering")
(tags "resistor 0805")
(path /5E058D96)
(attr smd)
- (fp_text reference D1 (at 0 -1.7) (layer F.SilkS)
+ (fp_text reference D1 (at 0 -1.7 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value LED (at 0 1.75) (layer F.Fab)
+ (fp_text value LED (at 0 1.75 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -2.2 -0.75) (end -2.2 0.75) (layer F.SilkS) (width 0.12))
@@ -752,9 +752,9 @@
(fp_line (start 0.2 0.4) (end -0.4 0) (layer F.Fab) (width 0.1))
(fp_line (start -0.4 0) (end 0.2 -0.4) (layer F.Fab) (width 0.1))
(fp_line (start -0.4 -0.4) (end -0.4 0.4) (layer F.Fab) (width 0.1))
- (pad 2 smd rect (at 1.35 0) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
+ (pad 2 smd rect (at 1.35 0 180) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
(net 7 "Net-(D1-Pad2)"))
- (pad 1 smd rect (at -1.35 0) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at -1.35 0 180) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl
(at (xyz 0 0 0))
@@ -764,15 +764,15 @@
)
(module LEDs:LED_0805_HandSoldering (layer F.Cu) (tedit 595FCA25) (tstamp 5DF3A8A4)
- (at 159.85 66 180)
+ (at 127.5 80.5)
(descr "Resistor SMD 0805, hand soldering")
(tags "resistor 0805")
(path /5E096F6F)
(attr smd)
- (fp_text reference D2 (at 0 -1.7) (layer F.SilkS)
+ (fp_text reference D2 (at 0 -1.7 -180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value LED (at 0 1.75) (layer F.Fab)
+ (fp_text value LED (at 0 1.75 -180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -0.4 -0.4) (end -0.4 0.4) (layer F.Fab) (width 0.1))
@@ -790,9 +790,9 @@
(fp_line (start 2.35 0.9) (end 2.35 -0.9) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.35 0.9) (end -2.35 0.9) (layer F.CrtYd) (width 0.05))
(fp_line (start -2.2 -0.75) (end -2.2 0.75) (layer F.SilkS) (width 0.12))
- (pad 1 smd rect (at -1.35 0 180) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at -1.35 0) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
- (pad 2 smd rect (at 1.35 0 180) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
+ (pad 2 smd rect (at 1.35 0) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
(net 8 "Net-(D2-Pad2)"))
(model ${KISYS3DMOD}/LEDs.3dshapes/LED_0805.wrl
(at (xyz 0 0 0))
@@ -835,9 +835,9 @@
(pad 4 smd rect (at 0.65 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 9 "Net-(J1-Pad4)"))
(pad 3 smd rect (at 0 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
- (net 45 /USB_P))
+ (net 39 /USB_P))
(pad 2 smd rect (at -0.65 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
- (net 46 /USB_N))
+ (net 40 /USB_N))
(pad 1 smd rect (at -1.3 -1.35 270) (size 1.35 0.4) (layers F.Cu F.Paste F.Mask)
(net 1 +5V))
)
@@ -1042,17 +1042,17 @@
(effects (font (size 1 1) (thickness 0.15)))
)
(pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 17 "Net-(J6-Pad1)"))
+ (net 41 /PB8))
(pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 18 "Net-(J6-Pad2)"))
+ (net 42 /PB9))
(pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 19 "Net-(J6-Pad3)"))
+ (net 43 /PB2))
(pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 20 "Net-(J6-Pad4)"))
+ (net 44 /PB7))
(pad 5 thru_hole oval (at 0 10.16 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 21 "Net-(J6-Pad5)"))
+ (net 45 /PB6))
(pad 6 thru_hole oval (at 0 12.7 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 22 "Net-(J6-Pad6)"))
+ (net 46 /PB5))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x06_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -1090,13 +1090,13 @@
(fp_line (start 1.27 -1.27) (end 1.27 8.89) (layer F.Fab) (width 0.1))
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(pad 4 thru_hole oval (at 0 7.62 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 23 "Net-(J7-Pad4)"))
+ (net 17 "Net-(J7-Pad4)"))
(pad 3 thru_hole oval (at 0 5.08 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 24 "Net-(J7-Pad3)"))
+ (net 18 "Net-(J7-Pad3)"))
(pad 2 thru_hole oval (at 0 2.54 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 25 "Net-(J7-Pad2)"))
+ (net 19 "Net-(J7-Pad2)"))
(pad 1 thru_hole rect (at 0 0 270) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 26 "Net-(J7-Pad1)"))
+ (net 20 "Net-(J7-Pad1)"))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x04_Pitch2.54mm.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -1134,13 +1134,13 @@
(fp_line (start 1.27 -1.27) (end 1.27 11.43) (layer F.Fab) (width 0.1))
(fp_line (start -0.635 -1.27) (end 1.27 -1.27) (layer F.Fab) (width 0.1))
(pad 5 thru_hole oval (at 0 10.16 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 27 /PA2))
+ (net 21 /PA2))
(pad 4 thru_hole oval (at 0 7.62 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 28 /PA3))
+ (net 22 /PA3))
(pad 3 thru_hole oval (at 0 5.08 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 29 /PA4))
+ (net 23 /PA4))
(pad 2 thru_hole oval (at 0 2.54 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
- (net 30 /PA5))
+ (net 24 /PA5))
(pad 1 thru_hole rect (at 0 0 90) (size 1.7 1.7) (drill 1) (layers *.Cu *.Mask)
(net 15 /PA8))
(model ${KISYS3DMOD}/Pin_Headers.3dshapes/Pin_Header_Straight_1x05_Pitch2.54mm.wrl
@@ -1217,7 +1217,7 @@
(pad 2 smd rect (at 1.35 0 90) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(pad 1 smd rect (at -1.35 0 90) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
- (net 31 "Net-(R1-Pad1)"))
+ (net 25 "Net-(R1-Pad1)"))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
(scale (xyz 1 1 1))
@@ -1226,15 +1226,15 @@
)
(module Resistors_SMD:R_0805_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5DF3A9A0)
- (at 159.85 68 180)
+ (at 127.55 82.6)
(descr "Resistor SMD 0805, hand soldering")
(tags "resistor 0805")
(path /5E096F69)
(attr smd)
- (fp_text reference R2 (at 0 -1.7) (layer F.SilkS)
+ (fp_text reference R2 (at 0 -1.7 -180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 330 (at 0 1.75) (layer F.Fab)
+ (fp_text value 330 (at 0 1.75 -180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start 2.35 0.9) (end -2.35 0.9) (layer F.CrtYd) (width 0.05))
@@ -1247,12 +1247,12 @@
(fp_line (start 1 -0.62) (end 1 0.62) (layer F.Fab) (width 0.1))
(fp_line (start 1 0.62) (end -1 0.62) (layer F.Fab) (width 0.1))
(fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
- (fp_text user %R (at 0 0) (layer F.Fab)
+ (fp_text user %R (at 0 0 -180) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.075)))
)
- (pad 2 smd rect (at 1.35 0 180) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
+ (pad 2 smd rect (at 1.35 0) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
(net 8 "Net-(D2-Pad2)"))
- (pad 1 smd rect (at -1.35 0 180) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at -1.35 0) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
(net 3 +3V3))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
@@ -1262,18 +1262,18 @@
)
(module Resistors_SMD:R_0805_HandSoldering (layer F.Cu) (tedit 58E0A804) (tstamp 5DF3A9B1)
- (at 154.65 68)
+ (at 159.95 75.8 180)
(descr "Resistor SMD 0805, hand soldering")
(tags "resistor 0805")
(path /5E057F6B)
(attr smd)
- (fp_text reference R3 (at 0 -1.7) (layer F.SilkS)
+ (fp_text reference R3 (at 0 -1.7 180) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value 330 (at 0 1.75) (layer F.Fab)
+ (fp_text value 330 (at 0 1.75 180) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text user %R (at 0 0) (layer F.Fab)
+ (fp_text user %R (at 0 0 180) (layer F.Fab)
(effects (font (size 0.5 0.5) (thickness 0.075)))
)
(fp_line (start -1 0.62) (end -1 -0.62) (layer F.Fab) (width 0.1))
@@ -1286,9 +1286,9 @@
(fp_line (start -2.35 -0.9) (end -2.35 0.9) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.35 0.9) (end 2.35 -0.9) (layer F.CrtYd) (width 0.05))
(fp_line (start 2.35 0.9) (end -2.35 0.9) (layer F.CrtYd) (width 0.05))
- (pad 1 smd rect (at -1.35 0) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
- (net 32 "Net-(R3-Pad1)"))
- (pad 2 smd rect (at 1.35 0) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at -1.35 0 180) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
+ (net 26 "Net-(R3-Pad1)"))
+ (pad 2 smd rect (at 1.35 0 180) (size 1.5 1.3) (layers F.Cu F.Paste F.Mask)
(net 7 "Net-(D1-Pad2)"))
(model ${KISYS3DMOD}/Resistors_SMD.3dshapes/R_0805.wrl
(at (xyz 0 0 0))
@@ -1298,14 +1298,14 @@
)
(module Buttons_Switches_SMD:SW_SPST_EVQQ2 (layer F.Cu) (tedit 5872491A) (tstamp 5DF3A9CC)
- (at 167 65 90)
+ (at 160.3 68.5)
(descr "Light Touch Switch, https://industrial.panasonic.com/cdbs/www-data/pdf/ATK0000/ATK0000CE28.pdf")
(path /5DF3BF27)
(attr smd)
- (fp_text reference SW1 (at 0.05 -3.95 90) (layer F.SilkS)
+ (fp_text reference SW1 (at 0.05 -3.95) (layer F.SilkS)
(effects (font (size 1 1) (thickness 0.15)))
)
- (fp_text value SW_Push (at 0 4.25 90) (layer F.Fab)
+ (fp_text value SW_Push (at 0 4.25) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_circle (center 0 0) (end 1.5 0) (layer F.Fab) (width 0.1))
@@ -1322,20 +1322,20 @@
(fp_line (start 5.25 3.25) (end -5.25 3.25) (layer F.CrtYd) (width 0.05))
(fp_line (start 5.25 -3.25) (end 5.25 3.25) (layer F.CrtYd) (width 0.05))
(fp_line (start -5.25 -3.25) (end 5.25 -3.25) (layer F.CrtYd) (width 0.05))
- (fp_text user %R (at 0.05 -3.95 90) (layer F.Fab)
+ (fp_text user %R (at 0.05 -3.95) (layer F.Fab)
(effects (font (size 1 1) (thickness 0.15)))
)
(fp_line (start -3.25 3) (end -3.25 -3) (layer F.Fab) (width 0.1))
(fp_line (start 3.25 3) (end -3.25 3) (layer F.Fab) (width 0.1))
(fp_line (start 3.25 -3) (end 3.25 3) (layer F.Fab) (width 0.1))
(fp_line (start -3.25 -3) (end 3.25 -3) (layer F.Fab) (width 0.1))
- (pad 2 smd rect (at 3.4 2 90) (size 3.2 1) (layers F.Cu F.Paste F.Mask)
+ (pad 2 smd rect (at 3.4 2) (size 3.2 1) (layers F.Cu F.Paste F.Mask)
(net 4 /NRST))
- (pad 2 smd rect (at -3.4 2 90) (size 3.2 1) (layers F.Cu F.Paste F.Mask)
+ (pad 2 smd rect (at -3.4 2) (size 3.2 1) (layers F.Cu F.Paste F.Mask)
(net 4 /NRST))
- (pad 1 smd rect (at -3.4 -2 90) (size 3.2 1) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at -3.4 -2) (size 3.2 1) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
- (pad 1 smd rect (at 3.4 -2 90) (size 3.2 1) (layers F.Cu F.Paste F.Mask)
+ (pad 1 smd rect (at 3.4 -2) (size 3.2 1) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(model Buttons_Switches_SMD.3dshapes\SW_SPST_EVQQ2.wrl
(at (xyz 0 0 0))
@@ -1399,45 +1399,45 @@
(pad 48 smd rect (at -4.4 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
(net 16 /VDD_TCXO))
(pad 47 smd rect (at -3.6 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 33 "Net-(U2-Pad46)"))
+ (net 27 "Net-(U2-Pad46)"))
(pad 46 smd rect (at -2.8 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 33 "Net-(U2-Pad46)"))
+ (net 27 "Net-(U2-Pad46)"))
(pad 45 smd rect (at -2 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 34 "Net-(U2-Pad45)"))
+ (net 28 "Net-(U2-Pad45)"))
(pad 44 smd rect (at -1.2 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(pad 43 smd rect (at -0.4 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 31 "Net-(R1-Pad1)"))
+ (net 25 "Net-(R1-Pad1)"))
(pad 42 smd rect (at 0.4 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
(net 12 /SWCLK))
(pad 41 smd rect (at 1.2 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
(net 11 /SWDIO))
(pad 40 smd rect (at 2 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 21 "Net-(J6-Pad5)"))
+ (net 46 /PB5))
(pad 39 smd rect (at 2.8 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 20 "Net-(J6-Pad4)"))
+ (net 45 /PB6))
(pad 38 smd rect (at 3.6 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 19 "Net-(J6-Pad3)"))
+ (net 44 /PB7))
(pad 37 smd rect (at 4.4 -6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 22 "Net-(J6-Pad6)"))
+ (net 43 /PB2))
(pad 36 smd rect (at 6.55 -4.4) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 17 "Net-(J6-Pad1)"))
+ (net 42 /PB9))
(pad 35 smd rect (at 6.55 -3.6) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 18 "Net-(J6-Pad2)"))
+ (net 41 /PB8))
(pad 34 smd rect (at 6.55 -2.8) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
(net 4 /NRST))
(pad 33 smd rect (at 6.55 -2) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 32 "Net-(R3-Pad1)"))
+ (net 26 "Net-(R3-Pad1)"))
(pad 32 smd rect (at 6.55 -1.2) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
(net 3 +3V3))
(pad 31 smd rect (at 6.55 -0.4) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 35 "Net-(U2-Pad31)"))
+ (net 29 "Net-(U2-Pad31)"))
(pad 30 smd rect (at 6.55 0.4) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 36 "Net-(U2-Pad30)"))
+ (net 30 "Net-(U2-Pad30)"))
(pad 29 smd rect (at 6.55 1.2) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 37 "Net-(U2-Pad29)"))
+ (net 31 "Net-(U2-Pad29)"))
(pad 28 smd rect (at 6.55 2) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 38 "Net-(U2-Pad28)"))
+ (net 32 "Net-(U2-Pad28)"))
(pad 27 smd rect (at 6.55 2.8) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(pad 26 smd rect (at 6.55 3.6) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
@@ -1445,13 +1445,13 @@
(pad 25 smd rect (at 6.55 4.4) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(pad 24 smd rect (at 4.4 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 27 /PA2))
+ (net 21 /PA2))
(pad 23 smd rect (at 3.59 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 28 /PA3))
+ (net 22 /PA3))
(pad 22 smd rect (at 2.8 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 29 /PA4))
+ (net 23 /PA4))
(pad 21 smd rect (at 2 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 30 /PA5))
+ (net 24 /PA5))
(pad 20 smd rect (at 1.2 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
(net 15 /PA8))
(pad 19 smd rect (at 0.4 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
@@ -1459,31 +1459,31 @@
(pad 18 smd rect (at -0.4 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
(net 13 /USART1_RX))
(pad 17 smd rect (at -1.2 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 26 "Net-(J7-Pad1)"))
+ (net 20 "Net-(J7-Pad1)"))
(pad 16 smd rect (at -2 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 25 "Net-(J7-Pad2)"))
+ (net 19 "Net-(J7-Pad2)"))
(pad 15 smd rect (at -2.8 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 24 "Net-(J7-Pad3)"))
+ (net 18 "Net-(J7-Pad3)"))
(pad 14 smd rect (at -3.6 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 23 "Net-(J7-Pad4)"))
+ (net 17 "Net-(J7-Pad4)"))
(pad 13 smd rect (at -4.4 6.1) (size 0.5 2.6) (layers F.Cu F.Paste F.Mask)
- (net 39 "Net-(U2-Pad13)"))
+ (net 33 "Net-(U2-Pad13)"))
(pad 12 smd rect (at -6.55 4.4) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 40 "Net-(U2-Pad12)"))
+ (net 34 "Net-(U2-Pad12)"))
(pad 11 smd rect (at -6.55 3.6) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 41 "Net-(U2-Pad11)"))
+ (net 35 "Net-(U2-Pad11)"))
(pad 10 smd rect (at -6.55 2.8) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 42 "Net-(U2-Pad10)"))
+ (net 36 "Net-(U2-Pad10)"))
(pad 9 smd rect (at -6.55 2) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 43 "Net-(U2-Pad9)"))
+ (net 37 "Net-(U2-Pad9)"))
(pad 8 smd rect (at -6.55 1.2) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 44 "Net-(U2-Pad8)"))
+ (net 38 "Net-(U2-Pad8)"))
(pad 7 smd rect (at -6.55 0.4) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(pad 1 smd rect (at -6.55 -4.4) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 45 /USB_P))
+ (net 39 /USB_P))
(pad 2 smd rect (at -6.55 -3.6) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
- (net 46 /USB_N))
+ (net 40 /USB_N))
(pad 3 smd rect (at -6.55 -2.8) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
(net 2 GND))
(pad 4 smd rect (at -6.55 -2) (size 2.6 0.5) (layers F.Cu F.Paste F.Mask)
@@ -1537,18 +1537,116 @@
)
)
+ (module Connector_Coaxial:SMA_Amphenol_132289_EdgeMount (layer F.Cu) (tedit 5DF66F4D) (tstamp 5E02FE55)
+ (at 168 82)
+ (descr http://www.amphenolrf.com/132289.html)
+ (tags SMA)
+ (path /5DF6BEFA)
+ (attr smd)
+ (fp_text reference J10 (at -3.96 -3 90) (layer F.SilkS)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
+ (fp_text value Conn_Coaxial (at 5 6) (layer F.Fab)
+ (effects (font (size 1 1) (thickness 0.15)))
+ )
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diff --git a/murata/CMWX1ZZABZ-091.net b/murata/CMWX1ZZABZ-091.net
index 393bfa4d2e33fe217bf519e272569686bbb04d19..86be5703043ff807863467bf524e6399294f5ec1 100644
--- a/murata/CMWX1ZZABZ-091.net
+++ b/murata/CMWX1ZZABZ-091.net
@@ -1,8 +1,8 @@
(export (version D)
(design
- (source /home/pln/kicad/e7020e_2020/murata/CMWX1ZZABZ-091.sch)
- (date "Fri 13 Dec 2019 04:57:29 PM CET")
- (tool "Eeschema 5.1.5")
+ (source "C:\\Users\\Crill\\Desktop\\Ny mapp\\e7020e_cmwx1zzabz\\murata\\CMWX1ZZABZ-091.sch")
+ (date "2019-12-15 18:48:48")
+ (tool "Eeschema (5.0.2)-1")
(sheet (number 1) (name /) (tstamps /)
(title_block
(title)
@@ -89,7 +89,7 @@
(value CMWX1ZZABZ-091)
(footprint CMWX1ZZABZ-091_Custom_Footprint:MODULE_CMWX1ZZABZ-091_LONGER_LEGS)
(datasheet https://wireless.murata.com/RFM/data/type_abz.pdf)
- (libsource (lib RF_Module) (part CMWX1ZZABZ-091) (description "LoRa/SigFox Module, STM32L072 MCU, muRata CMWX1ZZABZ"))
+ (libsource (lib CMWX1ZZABZ-091-rescue) (part CMWX1ZZABZ-091-RF_Module) (description ""))
(sheetpath (names /) (tstamps /))
(tstamp 5DF35B83))
(comp (ref J1)
@@ -235,10 +235,97 @@
(field (name Field6) None)
(field (name Field7) None)
(field (name Field8) U.FL-R-SMT_01_))
- (libsource (lib U.FL-R-SMT_01_) (part "U.FL-R-SMT(01)") (description ""))
+ (libsource (lib CMWX1ZZABZ-091-rescue) (part "U.FL-R-SMT(01)-U.FL-R-SMT_01_") (description ""))
(sheetpath (names /) (tstamps /))
- (tstamp 5E1F342D)))
+ (tstamp 5E1F342D))
+ (comp (ref J10)
+ (value Conn_Coaxial)
+ (footprint Connector_Coaxial:SMA_Amphenol_132289_EdgeMount)
+ (datasheet " ~")
+ (libsource (lib Connector) (part Conn_Coaxial) (description "coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, ...)"))
+ (sheetpath (names /) (tstamps /))
+ (tstamp 5DF6BEFA)))
(libparts
+ (libpart (lib CMWX1ZZABZ-091-rescue) (part CMWX1ZZABZ-091-RF_Module)
+ (footprints
+ (fp CMWX1ZZABZ*))
+ (fields
+ (field (name Reference) U)
+ (field (name Value) CMWX1ZZABZ-091-RF_Module)
+ (field (name Footprint) RF_Module:CMWX1ZZABZ))
+ (pins
+ (pin (num 1) (name PA12/USB_DP) (type BiDi))
+ (pin (num 2) (name PA11/USB_DM) (type BiDi))
+ (pin (num 3) (name GND) (type power_in))
+ (pin (num 4) (name VDD_USB) (type power_in))
+ (pin (num 5) (name VDD_MCU) (type power_in))
+ (pin (num 6) (name VDD_RF) (type power_in))
+ (pin (num 7) (name GND) (type passive))
+ (pin (num 8) (name DBG_SX1276_DIO2) (type BiDi))
+ (pin (num 9) (name DBG_SX1276_DI03) (type BiDi))
+ (pin (num 10) (name SX1276_DIO4) (type BiDi))
+ (pin (num 11) (name DBG_SX1276_DIO5) (type BiDi))
+ (pin (num 12) (name DBG_SX1276_DIO1) (type BiDi))
+ (pin (num 13) (name DBG_SX1276_DIO0) (type BiDi))
+ (pin (num 14) (name PB15/SPI2_MOSI) (type BiDi))
+ (pin (num 15) (name PB14/SPI2_MISO) (type BiDi))
+ (pin (num 16) (name PB13/SPI2_SCK) (type BiDi))
+ (pin (num 17) (name PB12/SPI2_NSS) (type BiDi))
+ (pin (num 18) (name PA10/USART1_RX) (type BiDi))
+ (pin (num 19) (name PA9/USART1_TX) (type BiDi))
+ (pin (num 20) (name PA8/MCO) (type BiDi))
+ (pin (num 21) (name PA5/ADC5/DAC2) (type BiDi))
+ (pin (num 22) (name PA4/ADC4/DAC1) (type BiDi))
+ (pin (num 23) (name PA3/ADC3) (type BiDi))
+ (pin (num 24) (name PA2/ADC2) (type BiDi))
+ (pin (num 25) (name GND) (type passive))
+ (pin (num 26) (name ANT) (type passive))
+ (pin (num 27) (name GND) (type passive))
+ (pin (num 28) (name DBG_CRF1) (type passive))
+ (pin (num 29) (name DBG_CRF3) (type passive))
+ (pin (num 30) (name DGB_CRF2) (type passive))
+ (pin (num 31) (name ~STSAFE_RST) (type passive))
+ (pin (num 32) (name VREF+) (type power_in))
+ (pin (num 33) (name PA0/WKUP1) (type BiDi))
+ (pin (num 34) (name ~MCU_RST) (type input))
+ (pin (num 35) (name PB8/I2C1_SCL) (type BiDi))
+ (pin (num 36) (name PB9/I2C1_SDA) (type BiDi))
+ (pin (num 37) (name PB2/LPTIM1_OUT) (type BiDi))
+ (pin (num 38) (name PB7/LPTIM1_IN2) (type BiDi))
+ (pin (num 39) (name PB6/LPTIM1_ETR) (type BiDi))
+ (pin (num 40) (name PB5/LPTIM1_IN1) (type BiDi))
+ (pin (num 41) (name PA13/SWDIO) (type BiDi))
+ (pin (num 42) (name PA14/SWCLK) (type BiDi))
+ (pin (num 43) (name BOOT0) (type input))
+ (pin (num 44) (name GND) (type passive))
+ (pin (num 45) (name PH1/OSC_OUT) (type BiDi))
+ (pin (num 46) (name PH0/OSC_IN) (type BiDi))
+ (pin (num 47) (name TCXO_OUT) (type output))
+ (pin (num 48) (name VDD_TCXO) (type power_in))
+ (pin (num 49) (name GND) (type passive))
+ (pin (num 50) (name GND) (type passive))
+ (pin (num 51) (name GND) (type passive))
+ (pin (num 52) (name GND) (type passive))
+ (pin (num 53) (name GND) (type passive))
+ (pin (num 54) (name GND) (type passive))
+ (pin (num 55) (name GND) (type passive))
+ (pin (num 56) (name GND) (type passive))
+ (pin (num 57) (name GND) (type passive))))
+ (libpart (lib CMWX1ZZABZ-091-rescue) (part "U.FL-R-SMT(01)-U.FL-R-SMT_01_")
+ (fields
+ (field (name Reference) J)
+ (field (name Value) "U.FL-R-SMT(01)-U.FL-R-SMT_01_")
+ (field (name Footprint) "HRS_U.FL-R-SMT(01)")
+ (field (name Datasheet) "U.FL Series 6 Ghz 50 Ohm Ultra-small SMT Coaxial Cable Receptacle")
+ (field (name Fält4) Hirose)
+ (field (name Fält5) Unavailable)
+ (field (name Fält6) None)
+ (field (name Fält7) None)
+ (field (name Fält8) U.FL-R-SMT_01_))
+ (pins
+ (pin (num 1) (name GND) (type passive))
+ (pin (num 2) (name GND) (type passive))
+ (pin (num 3) (name SIG) (type passive))))
(libpart (lib Connector) (part Conn_01x02_Male)
(description "Generic connector, single row, 01x02, script generated (kicad-library-utils/schlib/autogen/connector/)")
(docs ~)
@@ -304,6 +391,21 @@
(pin (num 4) (name Pin_4) (type passive))
(pin (num 5) (name Pin_5) (type passive))
(pin (num 6) (name Pin_6) (type passive))))
+ (libpart (lib Connector) (part Conn_Coaxial)
+ (description "coaxial connector (BNC, SMA, SMB, SMC, Cinch/RCA, ...)")
+ (docs " ~")
+ (footprints
+ (fp *BNC*)
+ (fp *SMA*)
+ (fp *SMB*)
+ (fp *SMC*)
+ (fp *Cinch*))
+ (fields
+ (field (name Reference) J)
+ (field (name Value) Conn_Coaxial))
+ (pins
+ (pin (num 1) (name In) (type passive))
+ (pin (num 2) (name Ext) (type passive))))
(libpart (lib Connector) (part USB_B_Micro)
(aliases
(alias USB_B_Mini))
@@ -367,75 +469,6 @@
(pins
(pin (num 1) (name ~) (type passive))
(pin (num 2) (name ~) (type passive))))
- (libpart (lib RF_Module) (part CMWX1ZZABZ-078)
- (aliases
- (alias CMWX1ZZABZ-091))
- (description "LoRa/SigFox Module, STM32L082 MCU, muRata CMWX1ZZABZ")
- (docs https://wireless.murata.com/RFM/data/type_abz.pdf)
- (footprints
- (fp CMWX1ZZABZ*))
- (fields
- (field (name Reference) U)
- (field (name Value) CMWX1ZZABZ-078)
- (field (name Footprint) RF_Module:CMWX1ZZABZ))
- (pins
- (pin (num 1) (name PA12/USB_DP) (type BiDi))
- (pin (num 2) (name PA11/USB_DM) (type BiDi))
- (pin (num 3) (name GND) (type power_in))
- (pin (num 4) (name VDD_USB) (type power_in))
- (pin (num 5) (name VDD_MCU) (type power_in))
- (pin (num 6) (name VDD_RF) (type power_in))
- (pin (num 7) (name GND) (type passive))
- (pin (num 8) (name DBG_SX1276_DIO2) (type BiDi))
- (pin (num 9) (name DBG_SX1276_DI03) (type BiDi))
- (pin (num 10) (name SX1276_DIO4) (type BiDi))
- (pin (num 11) (name DBG_SX1276_DIO5) (type BiDi))
- (pin (num 12) (name DBG_SX1276_DIO1) (type BiDi))
- (pin (num 13) (name DBG_SX1276_DIO0) (type BiDi))
- (pin (num 14) (name PB15/SPI2_MOSI) (type BiDi))
- (pin (num 15) (name PB14/SPI2_MISO) (type BiDi))
- (pin (num 16) (name PB13/SPI2_SCK) (type BiDi))
- (pin (num 17) (name PB12/SPI2_NSS) (type BiDi))
- (pin (num 18) (name PA10/USART1_RX) (type BiDi))
- (pin (num 19) (name PA9/USART1_TX) (type BiDi))
- (pin (num 20) (name PA8/MCO) (type BiDi))
- (pin (num 21) (name PA5/ADC5/DAC2) (type BiDi))
- (pin (num 22) (name PA4/ADC4/DAC1) (type BiDi))
- (pin (num 23) (name PA3/ADC3) (type BiDi))
- (pin (num 24) (name PA2/ADC2) (type BiDi))
- (pin (num 25) (name GND) (type passive))
- (pin (num 26) (name ANT) (type passive))
- (pin (num 27) (name GND) (type passive))
- (pin (num 28) (name DBG_CRF1) (type passive))
- (pin (num 29) (name DBG_CRF3) (type passive))
- (pin (num 30) (name DGB_CRF2) (type passive))
- (pin (num 31) (name ~STSAFE_RST) (type passive))
- (pin (num 32) (name VREF+) (type power_in))
- (pin (num 33) (name PA0/WKUP1) (type BiDi))
- (pin (num 34) (name ~MCU_RST) (type input))
- (pin (num 35) (name PB8/I2C1_SCL) (type BiDi))
- (pin (num 36) (name PB9/I2C1_SDA) (type BiDi))
- (pin (num 37) (name PB2/LPTIM1_OUT) (type BiDi))
- (pin (num 38) (name PB7/LPTIM1_IN2) (type BiDi))
- (pin (num 39) (name PB6/LPTIM1_ETR) (type BiDi))
- (pin (num 40) (name PB5/LPTIM1_IN1) (type BiDi))
- (pin (num 41) (name PA13/SWDIO) (type BiDi))
- (pin (num 42) (name PA14/SWCLK) (type BiDi))
- (pin (num 43) (name BOOT0) (type input))
- (pin (num 44) (name GND) (type passive))
- (pin (num 45) (name PH1/OSC_OUT) (type BiDi))
- (pin (num 46) (name PH0/OSC_IN) (type BiDi))
- (pin (num 47) (name TCXO_OUT) (type output))
- (pin (num 48) (name VDD_TCXO) (type power_in))
- (pin (num 49) (name GND) (type passive))
- (pin (num 50) (name GND) (type passive))
- (pin (num 51) (name GND) (type passive))
- (pin (num 52) (name GND) (type passive))
- (pin (num 53) (name GND) (type passive))
- (pin (num 54) (name GND) (type passive))
- (pin (num 55) (name GND) (type passive))
- (pin (num 56) (name GND) (type passive))
- (pin (num 57) (name GND) (type passive))))
(libpart (lib Regulator_Linear) (part LM1117-1.8)
(aliases
(alias LM1117-2.5)
@@ -462,222 +495,206 @@
(pin (num 3) (name VI) (type power_in))))
(libpart (lib Switch) (part SW_Push)
(description "Push button switch, generic, two pins")
- (docs ~)
(fields
(field (name Reference) SW)
(field (name Value) SW_Push))
(pins
(pin (num 1) (name 1) (type passive))
- (pin (num 2) (name 2) (type passive))))
- (libpart (lib U.FL-R-SMT_01_) (part "U.FL-R-SMT(01)")
- (fields
- (field (name Reference) J)
- (field (name Value) "U.FL-R-SMT(01)")
- (field (name Footprint) "HRS_U.FL-R-SMT(01)")
- (field (name Datasheet) "U.FL Series 6 Ghz 50 Ohm Ultra-small SMT Coaxial Cable Receptacle")
- (field (name Field4) Hirose)
- (field (name Field5) Unavailable)
- (field (name Field6) None)
- (field (name Field7) None)
- (field (name Field8) U.FL-R-SMT_01_))
- (pins
- (pin (num 1) (name GND) (type passive))
- (pin (num 2) (name GND) (type passive))
- (pin (num 3) (name SIG) (type passive)))))
+ (pin (num 2) (name 2) (type passive)))))
(libraries
+ (library (logical CMWX1ZZABZ-091-rescue)
+ (uri "C:\\Users\\Crill\\Desktop\\Ny mapp\\e7020e_cmwx1zzabz\\murata/CMWX1ZZABZ-091-rescue.lib"))
(library (logical Connector)
- (uri /usr/share/kicad/library/Connector.lib))
+ (uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Connector.lib"))
(library (logical Device)
- (uri /usr/share/kicad/library/Device.lib))
- (library (logical RF_Module)
- (uri /usr/share/kicad/library/RF_Module.lib))
+ (uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Device.lib"))
(library (logical Regulator_Linear)
- (uri /usr/share/kicad/library/Regulator_Linear.lib))
+ (uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Regulator_Linear.lib"))
(library (logical Switch)
- (uri /usr/share/kicad/library/Switch.lib))
- (library (logical U.FL-R-SMT_01_)
- (uri /home/pln/kicad/e7020e_2020/U.FL-R-SMT_01_/U.FL-R-SMT_01_.lib)))
+ (uri "C:\\Program Files\\KiCad\\share\\kicad\\library/Switch.lib")))
(nets
- (net (code 1) (name +3V3)
+ (net (code 1) (name "Net-(D1-Pad2)")
+ (node (ref D1) (pin 2))
+ (node (ref R3) (pin 2)))
+ (net (code 2) (name "Net-(R3-Pad1)")
+ (node (ref U2) (pin 33))
+ (node (ref R3) (pin 1)))
+ (net (code 3) (name +3V3)
+ (node (ref C8) (pin 1))
(node (ref J3) (pin 1))
- (node (ref J2) (pin 1))
- (node (ref U2) (pin 4))
+ (node (ref U2) (pin 6))
(node (ref R2) (pin 1))
+ (node (ref U2) (pin 32))
(node (ref U2) (pin 5))
(node (ref C4) (pin 1))
(node (ref C9) (pin 1))
- (node (ref C10) (pin 1))
- (node (ref U2) (pin 32))
- (node (ref C12) (pin 1))
(node (ref U1) (pin 2))
- (node (ref C8) (pin 1))
(node (ref J5) (pin 1))
- (node (ref U2) (pin 6))
+ (node (ref U2) (pin 4))
+ (node (ref C10) (pin 1))
+ (node (ref C12) (pin 1))
+ (node (ref C6) (pin 1))
(node (ref C7) (pin 1))
- (node (ref C6) (pin 1)))
- (net (code 2) (name /USART1_RX)
- (node (ref U2) (pin 18))
- (node (ref J4) (pin 2)))
- (net (code 3) (name /USART1_TX)
- (node (ref U2) (pin 19))
- (node (ref J4) (pin 1)))
- (net (code 4) (name GND)
- (node (ref C6) (pin 2))
- (node (ref SW1) (pin 1))
- (node (ref C5) (pin 2))
- (node (ref U2) (pin 7))
+ (node (ref J2) (pin 1)))
+ (net (code 4) (name /VDD_TCXO)
+ (node (ref J5) (pin 2))
+ (node (ref U2) (pin 48)))
+ (net (code 5) (name /PA8)
+ (node (ref U2) (pin 20))
+ (node (ref J5) (pin 3))
+ (node (ref J8) (pin 1)))
+ (net (code 6) (name /USART1_RX)
+ (node (ref J4) (pin 2))
+ (node (ref U2) (pin 18)))
+ (net (code 7) (name /USART1_TX)
+ (node (ref J4) (pin 1))
+ (node (ref U2) (pin 19)))
+ (net (code 8) (name GND)
+ (node (ref U2) (pin 55))
+ (node (ref U2) (pin 44))
+ (node (ref U2) (pin 54))
+ (node (ref U2) (pin 53))
+ (node (ref U2) (pin 56))
+ (node (ref U2) (pin 52))
+ (node (ref U2) (pin 51))
+ (node (ref U2) (pin 50))
+ (node (ref U2) (pin 49))
(node (ref C14) (pin 2))
+ (node (ref SW1) (pin 1))
(node (ref C11) (pin 2))
(node (ref C12) (pin 2))
(node (ref C10) (pin 2))
- (node (ref C7) (pin 2))
(node (ref C8) (pin 2))
- (node (ref D2) (pin 1))
- (node (ref U2) (pin 25))
- (node (ref J3) (pin 2))
- (node (ref C9) (pin 2))
- (node (ref C1) (pin 2))
- (node (ref U2) (pin 49))
- (node (ref D1) (pin 1))
- (node (ref J1) (pin 6))
- (node (ref U2) (pin 50))
- (node (ref U2) (pin 27))
- (node (ref U2) (pin 3))
- (node (ref U2) (pin 44))
+ (node (ref R1) (pin 2))
+ (node (ref C5) (pin 2))
(node (ref J2) (pin 3))
+ (node (ref C3) (pin 2))
+ (node (ref C4) (pin 2))
(node (ref J9) (pin 2))
(node (ref J9) (pin 1))
- (node (ref R1) (pin 2))
- (node (ref C3) (pin 2))
- (node (ref U2) (pin 53))
(node (ref C2) (pin 2))
- (node (ref U2) (pin 54))
- (node (ref U2) (pin 55))
(node (ref U1) (pin 1))
- (node (ref U2) (pin 52))
- (node (ref U2) (pin 56))
- (node (ref C4) (pin 2))
- (node (ref U2) (pin 57))
+ (node (ref C1) (pin 2))
+ (node (ref J3) (pin 2))
+ (node (ref J1) (pin 6))
+ (node (ref C7) (pin 2))
+ (node (ref U2) (pin 7))
+ (node (ref D1) (pin 1))
(node (ref J1) (pin 5))
- (node (ref U2) (pin 51)))
- (net (code 5) (name "Net-(R3-Pad1)")
- (node (ref U2) (pin 33))
- (node (ref R3) (pin 1)))
- (net (code 6) (name "Net-(D1-Pad2)")
- (node (ref D1) (pin 2))
- (node (ref R3) (pin 2)))
- (net (code 7) (name /VDD_TCXO)
- (node (ref U2) (pin 48))
- (node (ref J5) (pin 2)))
- (net (code 8) (name /PA8)
- (node (ref J5) (pin 3))
- (node (ref U2) (pin 20))
- (node (ref J8) (pin 1)))
+ (node (ref U2) (pin 57))
+ (node (ref J10) (pin 2))
+ (node (ref C6) (pin 2))
+ (node (ref D2) (pin 1))
+ (node (ref U2) (pin 25))
+ (node (ref U2) (pin 27))
+ (node (ref U2) (pin 3))
+ (node (ref C9) (pin 2)))
(net (code 9) (name +5V)
+ (node (ref C2) (pin 1))
+ (node (ref U1) (pin 3))
(node (ref C1) (pin 1))
(node (ref C3) (pin 1))
- (node (ref C2) (pin 1))
- (node (ref J1) (pin 1))
- (node (ref U1) (pin 3)))
- (net (code 10) (name "Net-(J1-Pad4)")
- (node (ref J1) (pin 4)))
- (net (code 11) (name /USB_N)
- (node (ref J1) (pin 2))
- (node (ref U2) (pin 2)))
- (net (code 12) (name /USB_P)
- (node (ref U2) (pin 1))
- (node (ref J1) (pin 3)))
- (net (code 13) (name /PA2)
- (node (ref J8) (pin 5))
- (node (ref U2) (pin 24)))
- (net (code 14) (name /PA3)
- (node (ref J8) (pin 4))
- (node (ref U2) (pin 23)))
- (net (code 15) (name /PA5)
- (node (ref J8) (pin 2))
- (node (ref U2) (pin 21)))
- (net (code 16) (name /PA4)
- (node (ref J8) (pin 3))
- (node (ref U2) (pin 22)))
- (net (code 17) (name "Net-(J6-Pad2)")
- (node (ref U2) (pin 35))
- (node (ref J6) (pin 2)))
- (net (code 18) (name "Net-(C13-Pad1)")
- (node (ref C14) (pin 1))
- (node (ref C13) (pin 1))
- (node (ref J9) (pin 3)))
- (net (code 19) (name "Net-(U2-Pad31)")
+ (node (ref J1) (pin 1)))
+ (net (code 10) (name "Net-(U2-Pad9)")
+ (node (ref U2) (pin 9)))
+ (net (code 11) (name "Net-(C11-Pad1)")
+ (node (ref C11) (pin 1))
+ (node (ref C13) (pin 2))
+ (node (ref U2) (pin 26)))
+ (net (code 12) (name "Net-(U2-Pad31)")
(node (ref U2) (pin 31)))
- (net (code 20) (name "Net-(J6-Pad1)")
- (node (ref J6) (pin 1))
- (node (ref U2) (pin 36)))
- (net (code 21) (name "Net-(U2-Pad11)")
+ (net (code 13) (name "Net-(U2-Pad11)")
(node (ref U2) (pin 11)))
- (net (code 22) (name "Net-(U2-Pad10)")
+ (net (code 14) (name "Net-(U2-Pad10)")
(node (ref U2) (pin 10)))
- (net (code 23) (name "Net-(U2-Pad9)")
- (node (ref U2) (pin 9)))
- (net (code 24) (name "Net-(U2-Pad8)")
+ (net (code 15) (name "Net-(U2-Pad8)")
(node (ref U2) (pin 8)))
- (net (code 25) (name "Net-(U2-Pad12)")
+ (net (code 16) (name "Net-(U2-Pad12)")
(node (ref U2) (pin 12)))
- (net (code 26) (name "Net-(U2-Pad13)")
+ (net (code 17) (name "Net-(U2-Pad13)")
(node (ref U2) (pin 13)))
- (net (code 27) (name "Net-(U2-Pad29)")
+ (net (code 18) (name "Net-(U2-Pad29)")
(node (ref U2) (pin 29)))
- (net (code 28) (name "Net-(U2-Pad30)")
+ (net (code 19) (name "Net-(U2-Pad30)")
(node (ref U2) (pin 30)))
- (net (code 29) (name "Net-(U2-Pad28)")
+ (net (code 20) (name "Net-(U2-Pad28)")
(node (ref U2) (pin 28)))
- (net (code 30) (name "Net-(D2-Pad2)")
- (node (ref D2) (pin 2))
- (node (ref R2) (pin 2)))
- (net (code 31) (name "Net-(J7-Pad3)")
+ (net (code 21) (name /PA5)
+ (node (ref U2) (pin 21))
+ (node (ref J8) (pin 2)))
+ (net (code 22) (name /PA4)
+ (node (ref U2) (pin 22))
+ (node (ref J8) (pin 3)))
+ (net (code 23) (name /PA3)
+ (node (ref U2) (pin 23))
+ (node (ref J8) (pin 4)))
+ (net (code 24) (name /PA2)
+ (node (ref J8) (pin 5))
+ (node (ref U2) (pin 24)))
+ (net (code 25) (name "Net-(C13-Pad1)")
+ (node (ref C14) (pin 1))
+ (node (ref J10) (pin 1))
+ (node (ref J9) (pin 3))
+ (node (ref C13) (pin 1)))
+ (net (code 26) (name /PB2)
+ (node (ref U2) (pin 37))
+ (node (ref J6) (pin 3)))
+ (net (code 27) (name /PB9)
+ (node (ref U2) (pin 36))
+ (node (ref J6) (pin 2)))
+ (net (code 28) (name /PB8)
+ (node (ref U2) (pin 35))
+ (node (ref J6) (pin 1)))
+ (net (code 29) (name "Net-(J7-Pad4)")
+ (node (ref J7) (pin 4))
+ (node (ref U2) (pin 14)))
+ (net (code 30) (name "Net-(J7-Pad3)")
(node (ref J7) (pin 3))
(node (ref U2) (pin 15)))
- (net (code 32) (name "Net-(J6-Pad3)")
- (node (ref U2) (pin 38))
- (node (ref J6) (pin 3)))
- (net (code 33) (name "Net-(J6-Pad4)")
- (node (ref U2) (pin 39))
- (node (ref J6) (pin 4)))
- (net (code 34) (name "Net-(J6-Pad6)")
- (node (ref J6) (pin 6))
- (node (ref U2) (pin 37)))
- (net (code 35) (name "Net-(J6-Pad5)")
- (node (ref U2) (pin 40))
- (node (ref J6) (pin 5)))
- (net (code 36) (name "Net-(J7-Pad4)")
- (node (ref U2) (pin 14))
- (node (ref J7) (pin 4)))
- (net (code 37) (name "Net-(J7-Pad2)")
- (node (ref U2) (pin 16))
- (node (ref J7) (pin 2)))
- (net (code 38) (name "Net-(J7-Pad1)")
+ (net (code 31) (name "Net-(J7-Pad2)")
+ (node (ref J7) (pin 2))
+ (node (ref U2) (pin 16)))
+ (net (code 32) (name "Net-(J7-Pad1)")
(node (ref U2) (pin 17))
(node (ref J7) (pin 1)))
+ (net (code 33) (name /PB7)
+ (node (ref J6) (pin 4))
+ (node (ref U2) (pin 38)))
+ (net (code 34) (name "Net-(D2-Pad2)")
+ (node (ref D2) (pin 2))
+ (node (ref R2) (pin 2)))
+ (net (code 35) (name "Net-(J1-Pad4)")
+ (node (ref J1) (pin 4)))
+ (net (code 36) (name /PB5)
+ (node (ref U2) (pin 40))
+ (node (ref J6) (pin 6)))
+ (net (code 37) (name /PB6)
+ (node (ref U2) (pin 39))
+ (node (ref J6) (pin 5)))
+ (net (code 38) (name "Net-(R1-Pad1)")
+ (node (ref R1) (pin 1))
+ (node (ref U2) (pin 43)))
(net (code 39) (name /SWDIO)
(node (ref J2) (pin 4))
(node (ref U2) (pin 41)))
(net (code 40) (name /SWCLK)
(node (ref J2) (pin 2))
(node (ref U2) (pin 42)))
- (net (code 41) (name "Net-(R1-Pad1)")
- (node (ref R1) (pin 1))
- (node (ref U2) (pin 43)))
- (net (code 42) (name /NRST)
- (node (ref SW1) (pin 2))
+ (net (code 41) (name /NRST)
(node (ref U2) (pin 34))
(node (ref J2) (pin 5))
- (node (ref C5) (pin 1)))
- (net (code 43) (name /SWO)
+ (node (ref C5) (pin 1))
+ (node (ref SW1) (pin 2)))
+ (net (code 42) (name /SWO)
(node (ref J2) (pin 6)))
- (net (code 44) (name "Net-(U2-Pad46)")
- (node (ref U2) (pin 47))
- (node (ref U2) (pin 46)))
- (net (code 45) (name "Net-(U2-Pad45)")
+ (net (code 43) (name "Net-(U2-Pad46)")
+ (node (ref U2) (pin 46))
+ (node (ref U2) (pin 47)))
+ (net (code 44) (name "Net-(U2-Pad45)")
(node (ref U2) (pin 45)))
- (net (code 46) (name "Net-(C11-Pad1)")
- (node (ref U2) (pin 26))
- (node (ref C11) (pin 1))
- (node (ref C13) (pin 2)))))
\ No newline at end of file
+ (net (code 45) (name /USB_N)
+ (node (ref U2) (pin 2))
+ (node (ref J1) (pin 2)))
+ (net (code 46) (name /USB_P)
+ (node (ref J1) (pin 3))
+ (node (ref U2) (pin 1)))))
\ No newline at end of file
diff --git a/murata/CMWX1ZZABZ-091.sch b/murata/CMWX1ZZABZ-091.sch
index 0b0a0185647ee805637afad6f1c1192293bd641d..185d0cc4f54360c5e0eda2c8f4a80043071d3870 100644
--- a/murata/CMWX1ZZABZ-091.sch
+++ b/murata/CMWX1ZZABZ-091.sch
@@ -1,5 +1,6 @@
EESchema Schematic File Version 4
-EELAYER 30 0
+LIBS:CMWX1ZZABZ-091-cache
+EELAYER 26 0
EELAYER END
$Descr A4 11693 8268
encoding utf-8
@@ -393,7 +394,7 @@ USART1_RX
Wire Wire Line
6900 5000 7450 5000
$Comp
-L RF_Module:CMWX1ZZABZ-091 U2
+L CMWX1ZZABZ-091-rescue:CMWX1ZZABZ-091-RF_Module U2
U 1 1 5DF35B83
P 6000 3700
F 0 "U2" H 6500 2200 50 0000 C CNN
@@ -866,12 +867,12 @@ Wire Wire Line
$Comp
L Connector:Conn_01x06_Male J6
U 1 1 5E0EC809
-P 8050 3100
-F 0 "J6" H 8022 2982 50 0000 R CNN
-F 1 "Conn_01x06_Male" H 8022 3073 50 0000 R CNN
-F 2 "Pin_Headers:Pin_Header_Straight_1x06_Pitch2.54mm" H 8050 3100 50 0001 C CNN
-F 3 "~" H 8050 3100 50 0001 C CNN
- 1 8050 3100
+P 8500 3100
+F 0 "J6" H 8472 2982 50 0000 R CNN
+F 1 "Conn_01x06_Male" H 8472 3073 50 0000 R CNN
+F 2 "Pin_Headers:Pin_Header_Straight_1x06_Pitch2.54mm" H 8500 3100 50 0001 C CNN
+F 3 "~" H 8500 3100 50 0001 C CNN
+ 1 8500 3100
-1 0 0 1
$EndComp
Wire Wire Line
@@ -882,10 +883,6 @@ Wire Wire Line
6900 3000 7850 3000
Wire Wire Line
7850 3100 6900 3100
-Wire Wire Line
- 7850 3300 6900 3300
-Wire Wire Line
- 6900 3200 7850 3200
$Comp
L Connector:Conn_01x05_Male J8
U 1 1 5E113468
@@ -976,7 +973,7 @@ Wire Wire Line
Wire Wire Line
7450 5000 7600 5000
$Comp
-L U.FL-R-SMT_01_:U.FL-R-SMT(01) J9
+L CMWX1ZZABZ-091-rescue:U.FL-R-SMT(01)-U.FL-R-SMT_01_ J9
U 1 1 5E1F342D
P 9100 5100
F 0 "J9" H 9302 5140 50 0000 L CNN
@@ -991,6 +988,65 @@ F 8 "U.FL-R-SMT_01_" H 9100 5100 50 0001 L BNN "Field8"
1 9100 5100
1 0 0 -1
$EndComp
+$Comp
+L Connector:Conn_Coaxial J10
+U 1 1 5DF6BEFA
+P 10400 4850
+F 0 "J10" H 10499 4826 50 0000 L CNN
+F 1 "Conn_Coaxial" H 10499 4735 50 0000 L CNN
+F 2 "Connector_Coaxial:SMA_Samtec_SMA-J-P-H-ST-EM1_EdgeMount" H 10400 4850 50 0001 C CNN
+F 3 " ~" H 10400 4850 50 0001 C CNN
+ 1 10400 4850
+ 1 0 0 -1
+$EndComp
+Wire Wire Line
+ 8500 5000 8500 4850
+Wire Wire Line
+ 8500 4850 10200 4850
+Wire Wire Line
+ 8050 5000 8500 5000
+Connection ~ 8500 5000
+Wire Wire Line
+ 8500 5000 8700 5000
+$Comp
+L power:GND #PWR026
+U 1 1 5DF71187
+P 10400 5150
+F 0 "#PWR026" H 10400 4900 50 0001 C CNN
+F 1 "GND" H 10405 4977 50 0000 C CNN
+F 2 "" H 10400 5150 50 0001 C CNN
+F 3 "" H 10400 5150 50 0001 C CNN
+ 1 10400 5150
+ 1 0 0 -1
+$EndComp
Wire Wire Line
- 8050 5000 8700 5000
+ 10400 5150 10400 5050
+Wire Wire Line
+ 7850 3300 6900 3300
+Wire Wire Line
+ 6900 3200 7850 3200
+Text Label 7850 3300 0 50 ~ 0
+PB9
+Text Label 8300 3200 2 50 ~ 0
+PB9
+Text Label 7850 3200 0 50 ~ 0
+PB8
+Text Label 8300 3300 2 50 ~ 0
+PB8
+Text Label 7850 2800 0 50 ~ 0
+PB2
+Text Label 8300 3100 2 50 ~ 0
+PB2
+Text Label 7850 3100 0 50 ~ 0
+PB7
+Text Label 8300 3000 2 50 ~ 0
+PB7
+Text Label 7850 3000 0 50 ~ 0
+PB6
+Text Label 8300 2900 2 50 ~ 0
+PB6
+Text Label 7850 2900 0 50 ~ 0
+PB5
+Text Label 8300 2800 2 50 ~ 0
+PB5
$EndSCHEMATC
diff --git a/murata/sym-lib-table b/murata/sym-lib-table
new file mode 100644
index 0000000000000000000000000000000000000000..f2062949b60980c0a1f06c7aae176569f758cef3
--- /dev/null
+++ b/murata/sym-lib-table
@@ -0,0 +1,3 @@
+(sym_lib_table
+ (lib (name CMWX1ZZABZ-091-rescue)(type Legacy)(uri ${KIPRJMOD}/CMWX1ZZABZ-091-rescue.lib)(options "")(descr ""))
+)