From 06ec2ea48f4b31cbb98ba32c06a3f78fe01f85d9 Mon Sep 17 00:00:00 2001 From: Per <Per Lindgren> Date: Sun, 15 Dec 2019 21:48:27 +0100 Subject: [PATCH] routing polish via --- murata/CMWX1ZZABZ-091.kicad_pcb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/murata/CMWX1ZZABZ-091.kicad_pcb b/murata/CMWX1ZZABZ-091.kicad_pcb index 44f2f32..601677c 100644 --- a/murata/CMWX1ZZABZ-091.kicad_pcb +++ b/murata/CMWX1ZZABZ-091.kicad_pcb @@ -1695,7 +1695,6 @@ (segment (start 142.5 75.5) (end 145 75.5) (width 0.25) (layer F.Cu) (net 2)) (via (at 135.1 72.8) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2)) (via (at 130.5 76) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2)) - (via (at 130.5 79) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2)) (via (at 164 75.5) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2)) (via (at 166.7 75.5) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2)) (via (at 168.2 75.5) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2) (tstamp 5E030A0B)) @@ -1742,6 +1741,7 @@ (via (at 157 73) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2)) (via (at 130.5 78) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2)) (via (at 130.5 80) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2)) + (via (at 130.5 79) (size 0.8) (drill 0.4) (layers F.Cu B.Cu) (net 2)) (segment (start 135 76) (end 135 78) (width 0.25) (layer F.Cu) (net 3)) (segment (start 135 78) (end 135 84) (width 0.25) (layer F.Cu) (net 3)) (segment (start 135 75.125) (end 135 76) (width 0.25) (layer F.Cu) (net 3)) -- GitLab