1. 17 Jan, 2018 2 commits
  2. 16 Jan, 2018 3 commits
  3. 15 Jan, 2018 10 commits
  4. 11 Jan, 2018 7 commits
    • homunkulus's avatar
      Auto merge of #69 - japaric:revise-api, r=japaric · 024527b4
      homunkulus authored
      revise peripheral API
      
      This PR changes the signature of many of the high level methods available on peripherals like
      `NVIC::get_priority`. Additionally some instance methods have been turned into static methods. The
      following guidelines have been used to apply the changes:
      
      - If the method body contains a single, atomic read operation with *no* side effects (e.g. the read
        operation clears one of the bits of the register): the signature changed to make the method
        static, i.e. `&self` was removed from the signature.
      
      - If the method involves writing to or a RMW operation on a register: the signature changed to take
        the singleton by `&mut self` reference.
      
      - If the method involves only read operations where at least one of them modifies the value
        of a register: the signature changed to take the singleton by `&mut self` reference.
      
      The rationale for this last guideline is that using `&self`, instead of `&mut self`, lets the user
      (unintentionally) break abstractions in the presence of generators. Example below:
      
      ``` rust
      let peripherals = Peripherals::take().unwrap();
      let syst = &peripherals.SYST;
      
      // tasks
      let mut a = || {
          loop {
              // yielding "busy wait"
              while !a.has_wrapped() {
                  yield;
              }
      
              // do stuff
          }
      };
      
      let mut b = || {
          // ..
      
          // *NOTE* the problem is in the line below: this `is_counter_enabled` method reads the CSR
          // register and that read operation clears the COUNTFLAG bit of the register (if set), which is
          // the bit the `has_wrapped` method checks for.
          if syst.is_counter_enabled() {
              // ..
          }
      
          // ..
      };
      ```
      
      One more guideline was considered but the required conditions didn't apply to any of the existing
      methods:
      
      - If the method involves only non side effectful, non necessarily atomic read operations: the
        signature of the method should remain as `&self`.
      
      The rationale for this guideline is that a static method (no `self` argument) wouldn't be
      appropriate because that can result in a torn read if the read operation can be preempted by some
      context that modifies the register.
      
      In any case, this last guideline doesn't seem to apply well to the peripherals structs exposed by
      this crate because they *deref* to a `RegisterBlock` that allows mutation through a `&self`
      reference. When these two properties (the guideline and `Deref<Target=RegisterBlock>`) are mixed
      the user can potentially break abstractions using generators (as shown in the `syst` example).
      
      cc @hannobraun
      closes #67
      024527b4
    • Jorge Aparicio's avatar
      fix thumbv6m build · 47623ceb
      Jorge Aparicio authored
      47623ceb
    • Jorge Aparicio's avatar
      address review comments · 5a19c39e
      Jorge Aparicio authored
      5a19c39e
    • homunkulus's avatar
      Auto merge of #72 - japaric:cm7-r0p1, r=japaric · 34f66210
      homunkulus authored
      add a Cargo feature, cm7-r0p1, to fix a Cortex-M7 BASEPRI erratum
      
      see japaric/cortex-m-rtfm#53 for background information
      34f66210
    • Jorge Aparicio's avatar
      cache the Xargo directory · f6ee6d0c
      Jorge Aparicio authored
      f6ee6d0c
    • homunkulus's avatar
      Auto merge of #73 - japaric:itm, r=japaric · 6a5a789b
      homunkulus authored
      make `Stim::write_*` methods take `&mut self` instead of `&self`
      
      this prevents people from overlapping non-atomic write operations on the same stimulus port when
      working with generators (cooperative tasks).
      
      For example, with this change the following code won't compile
      
      ``` rust
      let stim = &mut ITM.stim[0];
      let a = || {
          loop {
              // ..
              for byte in b"Hello, world!".iter() {
                  while !stim.is_fifo_ready() { yield }
                  stim.write_u8(*byte);
              }
              // ..
          }
      };
      
      let b = || {
          loop {
              // ..
              for byte in b"The quick brown fox jumps over the lazy dog".iter() {
                  while !stim.is_fifo_ready() { yield }
                  stim.write_u8(*byte);
              }
              // ..
          }
      };
      ```
      
      A possible fix for the above code is to use different stimulus ports in each task (generator).
      6a5a789b
    • Jorge Aparicio's avatar
      make `Stim::write_*` methods take `&mut self` instead of `&self` · ee21e7d6
      Jorge Aparicio authored
      this prevents people from overlapping non-atomic write operations on the same stimulus port when
      working with generators (cooperative tasks).
      
      For example, with this change the following code won't compile
      
      ``` rust
      let stim = &mut ITM.stim[0];
      let a = || {
          loop {
              // ..
              for byte in b"Hello, world!".iter() {
                  while !stim.is_fifo_ready() { yield }
                  stim.write_u8(*byte);
              }
              // ..
          }
      };
      
      let b = || {
          loop {
              // ..
              for byte in b"The quick brown fox jumps over the lazy dog".iter() {
                  while !stim.is_fifo_ready() { yield }
                  stim.write_u8(*byte);
              }
              // ..
          }
      };
      ```
      
      A possible fix for the above code is to use different stimulus ports in each task (generator).
      ee21e7d6
  5. 23 Dec, 2017 6 commits
  6. 21 Dec, 2017 1 commit
  7. 20 Dec, 2017 1 commit
    • homunkulus's avatar
      Auto merge of #62 - hannobraun:update-nvic, r=japaric · 4689992e
      homunkulus authored
      Update NVIC
      
      This pull request updated the NVIC definition and brings it in line with the ARMv7-M technical reference manual. Since ARMv6-M's NVIC is a subset of ARMv7-M's one, this should work on both platforms.
      
      I tried adding some `#[cfg(armv7m]`, to make only the registers available on ARMv6-M visible on that platform, but aborted that plan, as it seemed to add a lot of complexity. What do you think about this, @japaric?
      
      I also checked the [ARMv8-M Technical Reference Manual](https://static.docs.arm.com/ddi0553/a/DDI0553A_e_armv8m_arm.pdf). The NVIC is largely identical to ARMv7-M's one and only adds an additional block of registers between IABR and IPR, so it will be straight-forward to add support once that becomes relevant.
      4689992e
  8. 18 Dec, 2017 2 commits
  9. 09 Dec, 2017 6 commits
  10. 21 Nov, 2017 1 commit
  11. 04 Aug, 2017 1 commit