diff --git a/.cargo/config b/.cargo/config
index a7fff23b1f1a64f56520c03fe462d30a9c963c25..ec3e4e9f9f4e09c6ef0c1c02ce2667e97db68b91 100644
--- a/.cargo/config
+++ b/.cargo/config
@@ -23,6 +23,9 @@ rustflags = [
   # "-C", "linker=arm-none-eabi-gcc",
   # "-C", "link-arg=-Wl,-Tlink.x",
   # "-C", "link-arg=-nostartfiles",
+
+  # uncomment for unchecked wrapping arithmetics also in dev mode
+  # "-Z", "force-overflow-checks=off",
 ]
 
 [build]
diff --git a/.vscode/launch.json b/.vscode/launch.json
index 9885634c6f7d28f1b19065368d43da87d3465813..b61b652ebe740398cfaf97c44b2e864c70208fa9 100644
--- a/.vscode/launch.json
+++ b/.vscode/launch.json
@@ -168,6 +168,64 @@
             ],
             "cwd": "${workspaceRoot}"
         },
+        {
+            "type": "cortex-debug",
+            "request": "launch",
+            "servertype": "openocd",
+            "name": "bare1 (debug)",
+            "preLaunchTask": "cargo build --example bare1",
+            "executable": "./target/thumbv7em-none-eabihf/debug/examples/bare1",
+            "postLaunchCommands": [
+                "monitor arm semihosting enable"
+            ],
+            "swoConfig": {
+                "enabled": true,
+                "cpuFrequency": 16000000,
+                "swoFrequency": 2000000,
+                "source": "probe",
+                "decoders": [
+                    {
+                        "type": "console",
+                        "label": "ITM",
+                        "port": 0
+                    }
+                ]
+            },
+            "configFiles": [
+                "interface/stlink.cfg",
+                "target/stm32f4x.cfg"
+            ],
+            "cwd": "${workspaceRoot}"
+        },
+        {
+            "type": "cortex-debug",
+            "request": "launch",
+            "servertype": "openocd",
+            "name": "bare1 (release)",
+            "preLaunchTask": "cargo build --example bare1",
+            "executable": "./target/thumbv7em-none-eabihf/release/examples/bare1",
+            "postLaunchCommands": [
+                "monitor arm semihosting enable"
+            ],
+            "swoConfig": {
+                "enabled": true,
+                "cpuFrequency": 16000000,
+                "swoFrequency": 2000000,
+                "source": "probe",
+                "decoders": [
+                    {
+                        "type": "console",
+                        "label": "ITM",
+                        "port": 0
+                    }
+                ]
+            },
+            "configFiles": [
+                "interface/stlink.cfg",
+                "target/stm32f4x.cfg"
+            ],
+            "cwd": "${workspaceRoot}"
+        },
         {
             "type": "cortex-debug",
             "request": "launch",
diff --git a/.vscode/tasks.json b/.vscode/tasks.json
index d671b64862e64c639d36431ad9c7aeba30046529..d0ca15ac546b33228ab89ae5092ecab195ade166 100644
--- a/.vscode/tasks.json
+++ b/.vscode/tasks.json
@@ -87,5 +87,29 @@
                 "isDefault": true
             }
         },
+        {
+            "type": "shell",
+            "label": "cargo build --example bare1",
+            "command": "cargo build --example bare1",
+            "problemMatcher": [
+                "$rustc"
+            ],
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }
+        },
+        {
+            "type": "shell",
+            "label": "cargo build --example bare1 --release",
+            "command": "cargo build --example bare1 --release",
+            "problemMatcher": [
+                "$rustc"
+            ],
+            "group": {
+                "kind": "build",
+                "isDefault": true
+            }
+        },
     ]
 }
\ No newline at end of file
diff --git a/Cargo.toml b/Cargo.toml
index 1b4547c369086ab9b7e449825deb89b947cbd769..418318fdb985abb7efae28a30e13559c5b59183d 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -5,8 +5,11 @@ readme = "README.md"
 name = "app"
 version = "0.1.0"
 
+[dependencies.cortex-m]
+version = "0.5.8"
+features = ["inline-asm"] # <- currently requires nightly compiler
+
 [dependencies]
-cortex-m = "0.5.8"
 cortex-m-rt = "0.6.7"
 cortex-m-semihosting = "0.3.2"
 panic-halt = "0.2.0"
diff --git a/examples/bare0.rs b/examples/bare0.rs
index db9ae60dedf91c7af47ec02208e23d90577d8cc3..cfd6f9061e843acff464435a6fdbcc410dbae27e 100644
--- a/examples/bare0.rs
+++ b/examples/bare0.rs
@@ -1,5 +1,5 @@
 //! bare0.rs
-//! 
+//!
 //! Simple bare metal application
 //! What it covers:
 //! - constants
@@ -7,7 +7,7 @@
 //! - checked vs. wrapping arithmetics
 //! - safe and unsafe code
 //! - making a safe API
-//! 
+//!
 // build without the Rust standard library
 #![no_std]
 // no standard main, we declare main using [entry]
@@ -18,7 +18,7 @@ extern crate panic_halt;
 // Minimal runtime / startup for Cortex-M microcontrollers
 use cortex_m_rt::entry;
 
-// a constant (cannot be changed)
+// a constant (cannot be changed at run-time)
 const X_INIT: u32 = 10;
 
 // global mutabale variables (changed using unsafe code)
@@ -40,62 +40,65 @@ fn main() -> ! {
     }
 }
 
-// 1. run the program in the debugger,
-//    let the program run for a while and then press pause
-//    look in the (Local -vscode) Variables view what do you find
+// 1. Run the program in the debugger, let the program run for a while and
+//    then press pause. Look in the (Local -vscode) Variables view what do you find.
+//
 //    ** your answer here **
 //
-//    in the Expressions (WATCH -vscode) view add X and Y
+//    In the Expressions (WATCH -vscode) view add X and Y
 //    what do you find
 //
 //    ** your answer here **
-//    step through one complete iteration of the loop
+//
+//    Step through one complete iteration of the loop
 //    and see how the (Local) Variables are updated
 //    can you foresee what will eventually happen?
+//
 // 	  ** place your answer here **
 //
 //    commit your answers (bare0_1)
 //
-// 2. alter the constant X_INIT so that `x += 1` directly causes `x` to wrap
+// 2. Alter the constant X_INIT so that `x += 1` directly causes `x` to wrap
 // 	  what happens when `x` wraps
+//
 //    ** your answer here **
 //
 //    commit your answers (bare0_2)
 //
-// 3. place a breakpoint at `x += 1`
-//    change (both) += opertions to use wrapping_add
+// 3. Place a breakpoint at `x += 1`
+//
+//    Change (both) += opertions to use wrapping_add
 //    load and run the progam, what happens
 //    ** your answer here **
 //
-//    now continue exectution, what happens
+//    Now continue exectution, what happens
 //    ** your answer here **
 //
 //    commit your answers (bare0_3)
 //
-//    (if the program did not succeed back to the breakpoint
-//    you have some fault in the program and go back to 3)
+//    (If the program did not succeed back to the breakpoint
+//    you have some fault in the program and go back to 3.)
+//
+// 4. Change the asserion to `assert!(x == X && X == Y + 1)`, what happens?
 //
-// 4. change the asserion to `assert!(x == X && X == Y + 1)`, what happens
 //    ** place your answer here **
 //
 //    commit your answers (bare0_4)
 //
-// 5. remove the assertion and
-//
-//    make "safe" functions for reading and writing X and Y
+// 5. Remove the assertion and implement "safe" functions for
+//    reading and writing X and Y
 //    e.g. read_x, read_y, write_x, write_y
 //
-//    rewrite the program to use ONLY "safe" code besides the
+//    Rewrite the program to use ONLY "safe" code besides the
 //    read/write functions (which are internally "unsafe")
 //
 //    commit your solution (bare0_5)
 //
-// 6*. optional
-//    implement a read_u32/write_u32, taking a reference to a
+// 6. *Optional
+//    Implement a read_u32/write_u32, taking a reference to a
 //    "static" variable
 //
-//    rewrite the program to use this abstraction instead of "read_x", etc.
+//    Rewrite the program to use this abstraction instead of "read_x", etc.
 //
 //    commit your solution (bare0_6)
 //
-