From 72a7241d1dcfbaaf25b69819004306cb8a6e46e9 Mon Sep 17 00:00:00 2001
From: Per Lindgren <per.lindgren@ltu.se>
Date: Sat, 14 Nov 2020 22:40:11 +0100
Subject: [PATCH] main move to rtic6
---
.cargo/config | 2 +-
Cargo.toml | 2 +-
src/main.rs | 14 ++++++--------
3 files changed, 8 insertions(+), 10 deletions(-)
diff --git a/.cargo/config b/.cargo/config
index 5d4b78a..c0817cc 100644
--- a/.cargo/config
+++ b/.cargo/config
@@ -8,7 +8,7 @@
# runner = "arm-none-eabi-gdb -q -x openocd.gdb"
# runner = "gdb-multiarch -q -x openocd.gdb"
# runner = "gdb -q -x openocd.gdb"
-runner = "probe-run --chip STM32F411RETx"
+ runner = "probe-run --chip STM32F411RETx"
rustflags = [
# This is needed if your flash or ram addresses are not aligned to 0x10000 in memory.x
diff --git a/Cargo.toml b/Cargo.toml
index 5566427..98440a5 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -8,7 +8,7 @@ version = "0.1.0"
[dependencies]
cortex-m = "0.6.0"
cortex-m-rt = "0.6.13"
-cortex-m-rtic = "0.5.5"
+cortex-m-rtic = "0.6.0-alpha.0"
# tracing
cortex-m-semihosting = "0.3.5"
diff --git a/src/main.rs b/src/main.rs
index bc85ce1..d0a599c 100644
--- a/src/main.rs
+++ b/src/main.rs
@@ -10,24 +10,22 @@ use cortex_m;
use panic_rtt_target as _;
use rtt_target::{rprintln, rtt_init_print};
use stm32f4;
-
-// #[rtic::app(device = lm3s6965, peripherals = true)]
-#[rtic::app(device = stm32f4)]
-const APP: () = {
+#[rtic::app(device = stm32f4, peripherals = false)]
+mod app {
+ use super::*;
#[init]
- fn init(_cx: init::Context) {
-
+ fn init(_cx: init::Context) -> init::LateResources {
rtt_init_print!();
rprintln!("init");
+ init::LateResources {}
}
#[idle]
fn idle(_cx: idle::Context) -> ! {
-
rprintln!("idle");
panic!("panic");
loop {
continue;
}
}
-};
+}
--
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