diff --git a/debugbin2.txt b/debugbin2.txt
new file mode 100644
index 0000000000000000000000000000000000000000..18d71e7f18811b06861d557f7ad53ae62859f792
--- /dev/null
+++ b/debugbin2.txt
@@ -0,0 +1,39 @@
+
+target/thumbv7em-none-eabihf/debug/examples/bare2:     file format elf32-littlearm
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .vector_table 00000400  08000000  08000000  00010000  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  1 .text         00002a6e  08000400  08000400  00010400  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .rodata       000006c4  08002e70  08002e70  00012e70  2**4
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  3 .bss          00000000  20000000  20000000  00000000  2**2
+                  ALLOC
+  4 .data         00000000  20000000  20000000  00013534  2**2
+                  CONTENTS, ALLOC, LOAD, DATA
+  5 .debug_gdb_scripts 00000066  08000400  08000400  00013534  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_str    00011f33  00000000  00000000  0001359a  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_loc    00006f26  00000000  00000000  000254cd  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_abbrev 000012dc  00000000  00000000  0002c3f3  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_info   0001ab42  00000000  00000000  0002d6cf  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 000070c0  00000000  00000000  00048211  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 11 .debug_macinfo 00000008  00000000  00000000  0004f2d1  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 12 .debug_pubnames 0000327a  00000000  00000000  0004f2d9  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 13 .debug_pubtypes 0000454a  00000000  00000000  00052553  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 14 .ARM.attributes 00000036  00000000  00000000  00056a9d  2**0
+                  CONTENTS, READONLY
+ 15 .debug_frame  00002fcc  00000000  00000000  00056ad4  2**2
+                  CONTENTS, READONLY, DEBUGGING
+ 16 .debug_line   00007b0f  00000000  00000000  00059aa0  2**0
+                  CONTENTS, READONLY, DEBUGGING
diff --git a/examples/bare1.rs b/examples/bare1.rs
index bfa0249eae37121db2b19cc47cf87afe3c6c96c3..c6f034f43205f5bf66b059113c66979901b7fba5 100644
--- a/examples/bare1.rs
+++ b/examples/bare1.rs
@@ -27,7 +27,7 @@ fn main() {
 
     // to prevent returning
     loop {
-        cortex_m::asm::nop();
+            cortex_m::asm::nop();
         cortex_m::asm::bkpt();
     }
 }
diff --git a/examples/bare2.rs b/examples/bare2.rs
index be78e88cccffbe7f84d3d4823b9093d6675adc08..e9939498c2547607530531829e32e9e59765dbbc 100644
--- a/examples/bare2.rs
+++ b/examples/bare2.rs
@@ -41,21 +41,40 @@ fn main() {
 // > openocd -f interface/stlink.cfg -f target/stm32f4x.cfg
 //
 // what is the output in the ITM console
+// 
+// Start
+// s = 0
+// s = 1
+// s = 2
+// ...
+// 
 // ** your answer here **
 //
 // estimate the frequency of the output, give freq in hz
+//
+// .8 hz
+// 49 tick in 60s
+//
 // ** your answer here **
 //
 // commit your answers (bare2_1)
 //
 // 2. rebuild and run in release mode
 // estimate the frequency of the output, give freq in hz
-// ** your answer here **
+//
+// .8 hz
+// 49 tick in 60s
+//
+//** your answer here **
 //
 // estimate the ratio between debug/release optimized code
 // (speedup)
 // ** your answer here **
 //
+// The some frezvens
+// The main time comsumtion si from the wait. And the wait cant be optimised.
+// The marginal gain in the lops is close to zero compart to wait(100_000)
+//
 // commit your answers (bare2_2)
 //
 // 3. optional
@@ -63,8 +82,11 @@ fn main() {
 // for both debug and release binaries. How do they differ
 // ** your answer here **
 //
+// the nubmers int the categorys differs.
+// the categorys and otehr texts appers to be the some.
+//
 // commit your answers (bare2_3)
-
+ 
 // As we are not using interrupts, we just register a dummy catch all handler
 #[link_section = ".vector_table.interrupts"]
 #[used]
diff --git a/examples/bare3.rs b/examples/bare3.rs
index 272d9fbebbcaf788f36c98035b24ccbd8f87bf4c..8733988487f6c48e8615ccb7d627c8d2c384078c 100644
--- a/examples/bare3.rs
+++ b/examples/bare3.rs
@@ -13,21 +13,23 @@ use core::str;
 extern crate cortex_m_debug;
 
 fn main() {
-    let s = "ABCD";
-    let bs = s.as_bytes();
+    let s: &str = "ABCD";
+    let bs: &[u8] = s.as_bytes();
 
     ipln!("s = {}", s);
     ipln!("bs = {:?}", bs);
 
     ipln!("iterate over slice");
+    let c: u8;
     for c in bs {
-        ip!("{},", c)
+        ip!("{},", c);
     }
 
-    let mut a = [65u8; 4];
-    //let mut a = [0u8; 4];
+    let mut a = bs;
+
     ipln!();
     ipln!("iterate iterate using (raw) indexing");
+    let i: usize;
     for i in 0..s.len() {
         ip!("{},", bs[i]);
     }
@@ -49,21 +51,34 @@ fn main() {
 //
 // what is the output in the ITM console
 // ** your answer here **
+//  s = ABCD
+//  bs = [65, 66 ,67, 68]
+//  iteratie over slice
+//  65,66,67,68
+//  iterate iterate using (raw) indexing
+//  65,66,67,68
+//  a = AAAA
 //
 // what is the type of `s`
 // ** your answer here **
+//  String
 //
 // what is the type of `bs`
 // ** your answer here **
+//  aray u8
 //
 // what is the type of `c`
 // ** your answer here **
+//  u8
 //
 // what is the type of `a`
 // ** your answer here **
+//  array u8 
+//  contains [65,65,65,65]
 //
 // what is the type of `i`
 // ** your answer here **
+//  usize
 //
 // commit your answers (bare3_1)
 //
@@ -74,6 +89,8 @@ fn main() {
 // 3. uncomment line 28 (let mut a = [0u8; 4];)
 // what happens and why
 // ** your answer here **
+//  the outprint from a become:
+//  a = 
 //
 // commit your answers (bare3_3)
 //
diff --git a/examples/bare4.rs b/examples/bare4.rs
index 6fc12521306057ceed2e3c47854d2d523fc553fb..13b684d1f89789a378432e2dacc85b3ddb1dc144 100644
--- a/examples/bare4.rs
+++ b/examples/bare4.rs
@@ -27,8 +27,8 @@ use address::*;
 
 #[inline(always)]
 fn read_u32(addr: u32) -> u32 {
-    unsafe { core::ptr::read_volatile(addr as *const _) }
-    //core::ptr::read_volatile(addr as *const _)
+    //unsafe { core::ptr::read_volatile(addr as *const _) }
+    core::ptr::read_volatile(addr as *const _)
 }
 
 #[inline(always)]
@@ -70,6 +70,7 @@ fn main() {
 // 1. build and run the application (debug build)
 // did you enjoy the blinking?
 // ** your answer here **
+//  No, it is enoing.
 //
 // now lookup the data-sheets, and read each section referred,
 // 6.3.11, 8.4.1, 8.4.7
@@ -82,10 +83,13 @@ fn main() {
 // 2. comment out line 30 and uncomment line 31 (essentially omitting the `unsafe`)
 // what was the error message and explain why,
 // ** your answer here **
+//  call to unsafe function recvier unsafe function or blok
 //
 // digging a bit deeper, why do you think `read_volatile` is declared `unsafe`
 // (https://doc.rust-lang.org/core/ptr/fn.read_volatile.html, for some food for thought )
 // ** your answer here **
+// it is reading a operation from a perifial. perifials ar critical resorses and writ operations
+// kan cas race condition in combination with read.
 //
 // commit your answers (bare4_2)
 //
@@ -99,14 +103,22 @@ fn main() {
 //
 // why is important that ordering of volatile operations are ensured by the compiler?
 // ** your answer here **
+//  The order of the operations can efekt the out come of the program, race condition.
 //
 // give an example in the above code, where reordering might make things go horribly wrong
 // (hint, accessing a peripheral not being powered...)
 // ** your answer here **
+//  in som cases wen seting an walue or aktivating a perifial is nessesary to do befor a read or
+//  simelar.
+//  seting gpioA ass activ befor reading. the compiler do not know if a perifial writ is to set a
+//  setin or blink a led.
 //
 // without the non-reording proprety of `write_volatile/read_volatile` could that happen in theory
 // (argue from the point of data dependencies)
 // ** your answer here **
+// If the compiler is left to it self wil it in som case changes the order of the read/write
+// operation. if somthig can gow wrong it will. sow it is lickly that the program is broken if the
+// is no forsd ordering
 //
 // commit your answers (bare4_3)
 
diff --git a/relisebin2.txt b/relisebin2.txt
new file mode 100644
index 0000000000000000000000000000000000000000..d94ccd28100344b0fc87eb036e98d19e27abb96e
--- /dev/null
+++ b/relisebin2.txt
@@ -0,0 +1,39 @@
+
+target/thumbv7em-none-eabihf/release/examples/bare2:     file format elf32-littlearm
+
+Sections:
+Idx Name          Size      VMA       LMA       File off  Algn
+  0 .vector_table 00000400  08000000  08000000  00010000  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  1 .text         00000ed8  08000400  08000400  00010400  2**2
+                  CONTENTS, ALLOC, LOAD, READONLY, CODE
+  2 .rodata       00000304  080012e0  080012e0  000112e0  2**4
+                  CONTENTS, ALLOC, LOAD, READONLY, DATA
+  3 .bss          00000000  20000000  20000000  00000000  2**2
+                  ALLOC
+  4 .data         00000000  20000000  20000000  000115e4  2**2
+                  CONTENTS, ALLOC, LOAD, DATA
+  5 .debug_gdb_scripts 00000022  08000400  08000400  000115e4  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  6 .debug_str    000036bc  00000000  00000000  00011606  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  7 .debug_loc    00001748  00000000  00000000  00014cc2  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  8 .debug_abbrev 00000e42  00000000  00000000  0001640a  2**0
+                  CONTENTS, READONLY, DEBUGGING
+  9 .debug_info   000068e1  00000000  00000000  0001724c  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 10 .debug_ranges 00000dc8  00000000  00000000  0001db2d  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 11 .debug_macinfo 00000007  00000000  00000000  0001e8f5  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 12 .debug_pubnames 0000114c  00000000  00000000  0001e8fc  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 13 .debug_pubtypes 000020d0  00000000  00000000  0001fa48  2**0
+                  CONTENTS, READONLY, DEBUGGING
+ 14 .ARM.attributes 00000034  00000000  00000000  00021b18  2**0
+                  CONTENTS, READONLY
+ 15 .debug_frame  00000340  00000000  00000000  00021b4c  2**2
+                  CONTENTS, READONLY, DEBUGGING
+ 16 .debug_line   00001d8c  00000000  00000000  00021e8c  2**0
+                  CONTENTS, READONLY, DEBUGGING