diff --git a/examples/bare6.rs b/examples/bare6.rs
index d7c42b9d73f9b613298d26101b6d496888a8d755..2ec90ddfeb82c530122e98fef5f4d7931259164a 100644
--- a/examples/bare6.rs
+++ b/examples/bare6.rs
@@ -2,15 +2,16 @@
 //! Simple bare metal application
 //!
 #![feature(used)]
-#![feature(use_nested_groups)]
 #![no_std]
 
+extern crate f4;
 extern crate stm32f40x;
 
 #[macro_use]
 extern crate cortex_m_debug;
-
-use stm32f40x::{DWT, GPIOA, GPIOC, RCC};
+use f4::clock;
+use f4::prelude::*;
+use stm32f40x::{DWT, FLASH, GPIOA, GPIOC, RCC};
 
 fn main() {
     ipln!("init");
@@ -18,9 +19,11 @@ fn main() {
     let rcc = unsafe { &mut *RCC.get() }; // get the reference to RCC in memory
     let gpioa = unsafe { &mut *GPIOA.get() }; // get the reference to GPIOA in memory
     let gpioc = unsafe { &mut *GPIOC.get() }; // get the reference to GPIOC in memory
+    let flash = unsafe { &mut *FLASH.get() }; // get the reference to FLASH in memory
 
     dwt.enable_cycle_counter();
     clock_out(rcc, gpioc);
+    //clock::set_84_mhz(rcc, flash);
     idle(dwt, rcc, gpioa);
 }
 
@@ -60,9 +63,11 @@ fn clock_out(rcc: &mut RCC, gpioc: &mut GPIOC) {
         .ospeedr
         .modify(|_, w| unsafe { w.ospeedr9().bits(0b11) });
 }
+
 // user application
 fn idle(dwt: &mut DWT, rcc: &mut RCC, gpioa: &mut GPIOA) {
     ipln!("idle");
+
     // power on GPIOA, RM0368 6.3.11
     rcc.ahb1enr.modify(|_, w| w.gpioaen().set_bit());
 
@@ -145,9 +150,33 @@ fn idle(dwt: &mut DWT, rcc: &mut RCC, gpioa: &mut GPIOA) {
 //
 // commit your answers (bare6_4)
 //
-// 5. now reprogram the PC9 to be "Low Speed", and re-run at 64Mz
+// 5. now we will put the MCU in 84MHz using the function
+// clock::set_84_mhz(rcc, flash);
+//
+// this function is part of the `f4` support crate (by Johonnes Sjölund)
+// besides `rcc` (for clocking) it takes `flash` as a parameter to set
+// up correct latency (wait states) for the flash memory (where our
+// program typically resides). This is required since the flash cannot
+// operate at the full 84MHz, so the MCU has to wait for the memory.
+//
+// repeat the experiment 2.
+// what is the frequency of MCO2 read by the oscilloscope
+// ** your answer here **
+//
+// compute the value of SYSCLK based on the oscilloscope reading
+// ** your answer here **
+// what is the peak to peak reading of the signal
+//
+// ** your answer here **
+//
+// make a screen dump or photo of the oscilloscope output
+// sove the the picture as "bare_6_84mhz_high_speed"
+//
+// commit your answers (bare6_5)
+//
+// 6. now reprogram the PC9 to be "Low Speed", and re-run at 64Mz
 //
-// did the frequency change in comparison to assignment 4.
+// did the frequency change in comparison to assignment 5.
 // ** your answer here **
 //
 // what is the peak to peak reading of the signal
@@ -157,6 +186,6 @@ fn idle(dwt: &mut DWT, rcc: &mut RCC, gpioa: &mut GPIOA) {
 // ** your answer here **
 //
 // make a screen dump or photo of the oscilloscope output
-// sove the the picture as "bare_6_64mhz_low_speed"
+// sove the the picture as "bare_6_84mhz_low_speed"
 //
-// commit your answers (bare6_24)
+// commit your answers (bare6_6)