diff --git a/.vscode/launch.json b/.vscode/launch.json
index 71beebbae83ea72184437371f959cb3cad10edc6..6e016a822b9f0bd79e30afb19eced0c648299d88 100644
--- a/.vscode/launch.json
+++ b/.vscode/launch.json
@@ -30,7 +30,7 @@
             ],
             "swoConfig": {
                 "enabled": true,
-                "cpuFrequency": 8000000,
+                "cpuFrequency": 16000000,
                 "swoFrequency": 2000000,
                 "source": "probe",
                 "decoders": [
diff --git a/Cargo.toml b/Cargo.toml
index f5855a07b10dadd1a1651ff3ba37c8d6a8045b4e..3f3b111d57a7fbd0464c49505a01cdab059178eb 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -10,18 +10,19 @@ cortex-m = "0.6.4"
 cortex-m-rt = "0.6.13"
 cortex-m-semihosting = "0.3.7"
 cortex-m-rtic = "0.5.5"
+embedded-hal = "0.2.4"
 
 # Panic handlers, comment all but one to generate doc!
 panic-halt = "0.2.0"
 
 # Uncomment for the panic example.
-panic-itm = "0.4.2"
+#panic-itm = "0.4.2"
 
 # Uncomment for the rtt-timing example.
-panic-rtt-target = { version = "0.1.1", features = ["cortex-m"] }
+#panic-rtt-target = { version = "0.1.1", features = ["cortex-m"] }
 
 # Uncomment for the panic example.
-panic-semihosting = "0.5.6"
+#panic-semihosting = "0.5.6"
 
 # Tracing
 rtt-target = { version = "0.3.0", features = ["cortex-m"] }
@@ -33,12 +34,10 @@ features = ["stm32f411", "rt"]
 # Uncomment for the allocator example.
 # alloc-cortex-m = "0.4.0"
 
-# Uncomment for the device example.
-# Update `memory.x`, set target to `thumbv7em-none-eabihf` in `.cargo/config`,
-# and then use `cargo build --examples device` to build it.
-# [dependencies.stm32f3]
-# features = ["stm32f303", "rt"]
-# version = "0.7.1"
+
+[dependencies.stm32f4xx-hal]
+version = "0.8.3"
+features = ["rt", "stm32f411"] 
 
 # this lets you use `cargo fix`!
 [[bin]]
diff --git a/README.md b/README.md
index 293c092056e5fbe9f12f8e72a40ace85d5c83079..16d1519528fa4c064b2d548d8819d0b7682151c0 100644
--- a/README.md
+++ b/README.md
@@ -1,135 +1,18 @@
-# `cortex-m-quickstart`
+# App
 
-> A template for building applications for ARM Cortex-M microcontrollers
+## Resources
 
-This project is developed and maintained by the [Cortex-M team][team].
+- [UM1724 - stm32 Nucleo-64](https://www.st.com/resource/en/user_manual/dm00105823-stm32-nucleo64-boards-mb1136-stmicroelectronics.pdf)
 
-## Dependencies
+- [RM0383 - F411 Reference Manual](https://www.st.com/resource/zh/reference_manual/dm00119316-stm32f411xce-advanced-armbased-32bit-mcus-stmicroelectronics.pdf) and [RM0368 - F401 Reference Manual](https://www.st.com/resource/en/reference_manual/dm00096844-stm32f401xbc-and-stm32f401xde-advanced-armbased-32bit-mcus-stmicroelectronics.pdf)
 
-To build embedded programs using this template you'll need:
+- [PM0214 - M4 Programming manual](https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=&ved=2ahUKEwjOtd645OTtAhXEHXcKHdwYCoQQFjAAegQIBhAC&url=https%3A%2F%2Fwww.st.com%2Fresource%2Fen%2Fprogramming_manual%2Fdm00046982-stm32-cortex-m4-mcus-and-mpus-programming-manual-stmicroelectronics.pdf&usg=AOvVaw0n3XXybtMMDbifhDZse1Pl)
 
-- Rust 1.31, 1.30-beta, nightly-2018-09-13 or a newer toolchain. e.g. `rustup
-  default beta`
+- [PMW3389DM-T3QU](https://www.google.com/url?sa=t&rct=j&q=&esrc=s&source=web&cd=&ved=2ahUKEwicx5OA9eTtAhWC-yoKHVfKAJ0QFjAAegQIBhAC&url=https%3A%2F%2Fwww.pixart.com%2F_getfs.php%3Ftb%3Dproduct%26id%3D4%26fs%3Dck2_fs_cn&usg=AOvVaw1A1rR533Pt-7EgnVSS-_ch), optical navigation chip
 
-- The `cargo generate` subcommand. [Installation
-  instructions](https://github.com/ashleygwilliams/cargo-generate#installation).
+- [Jack Enterprice Breakout Board](https://www.tindie.com/products/jkicklighter/pmw3389-motion-sensor/), an example design with software linked.
 
-- `rust-std` components (pre-compiled `core` crate) for the ARM Cortex-M
-  targets. Run:
+## Debug interface
 
-``` console
-$ rustup target add thumbv6m-none-eabi thumbv7m-none-eabi thumbv7em-none-eabi thumbv7em-none-eabihf
-```
-
-## Using this template
-
-**NOTE**: This is the very short version that only covers building programs. For
-the long version, which additionally covers flashing, running and debugging
-programs, check [the embedded Rust book][book].
-
-[book]: https://rust-embedded.github.io/book
-
-0. Before we begin you need to identify some characteristics of the target
-  device as these will be used to configure the project:
-
-- The ARM core. e.g. Cortex-M3.
-
-- Does the ARM core include an FPU? Cortex-M4**F** and Cortex-M7**F** cores do.
-
-- How much Flash memory and RAM does the target device has? e.g. 256 KiB of
-  Flash and 32 KiB of RAM.
-
-- Where are Flash memory and RAM mapped in the address space? e.g. RAM is
-  commonly located at address `0x2000_0000`.
-
-You can find this information in the data sheet or the reference manual of your
-device.
-
-In this example we'll be using the STM32F3DISCOVERY. This board contains an
-STM32F303VCT6 microcontroller. This microcontroller has:
-
-- A Cortex-M4F core that includes a single precision FPU
-
-- 256 KiB of Flash located at address 0x0800_0000.
-
-- 40 KiB of RAM located at address 0x2000_0000. (There's another RAM region but
-  for simplicity we'll ignore it).
-
-1. Instantiate the template.
-
-``` console
-$ cargo generate --git https://github.com/rust-embedded/cortex-m-quickstart
- Project Name: app
- Creating project called `app`...
- Done! New project created /tmp/app
-
-$ cd app
-```
-
-2. Set a default compilation target. There are four options as mentioned at the
-   bottom of `.cargo/config`. For the STM32F303VCT6, which has a Cortex-M4F
-   core, we'll pick the `thumbv7em-none-eabihf` target.
-
-``` console
-$ tail -n6 .cargo/config
-```
-
-``` toml
-[build]
-# Pick ONE of these compilation targets
-# target = "thumbv6m-none-eabi"    # Cortex-M0 and Cortex-M0+
-# target = "thumbv7m-none-eabi"    # Cortex-M3
-# target = "thumbv7em-none-eabi"   # Cortex-M4 and Cortex-M7 (no FPU)
-target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)
-```
-
-3. Enter the memory region information into the `memory.x` file.
-
-``` console
-$ cat memory.x
-/* Linker script for the STM32F303VCT6 */
-MEMORY
-{
-  /* NOTE 1 K = 1 KiBi = 1024 bytes */
-  FLASH : ORIGIN = 0x08000000, LENGTH = 256K
-  RAM : ORIGIN = 0x20000000, LENGTH = 40K
-}
-```
-
-4. Build the template application or one of the examples.
-
-``` console
-$ cargo build
-```
-
-## VS Code
-
-This template includes launch configurations for debugging CortexM programs with Visual Studio Code located in the `.vscode/` directory.  
-See [.vscode/README.md](./.vscode/README.md) for more information.  
-If you're not using VS Code, you can safely delete the directory from the generated project.
-
-# License
-
-This template is licensed under either of
-
-- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
-  http://www.apache.org/licenses/LICENSE-2.0)
-
-- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
-
-at your option.
-
-## Contribution
-
-Unless you explicitly state otherwise, any contribution intentionally submitted
-for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
-dual licensed as above, without any additional terms or conditions.
-
-## Code of Conduct
-
-Contribution to this crate is organized under the terms of the [Rust Code of
-Conduct][CoC], the maintainer of this crate, the [Cortex-M team][team], promises
-to intervene to uphold that code of conduct.
-
-[CoC]: https://www.rust-lang.org/policies/code-of-conduct
-[team]: https://github.com/rust-embedded/wg#the-cortex-m-team
+- Serial Wire debugging uses pins PA13 and PA14.
+  
\ No newline at end of file
diff --git a/examples/itm.rs b/examples/itm.rs
index 82f4150886e7f0c7fd486b76da372c13cb57d398..e70922678d7fe6251a0411e12d426d96e528dea4 100644
--- a/examples/itm.rs
+++ b/examples/itm.rs
@@ -21,6 +21,7 @@ use panic_halt as _;
 
 use cortex_m::{iprintln, Peripherals};
 use cortex_m_rt::entry;
+use stm32f4 as _; // to get interrupt vectors
 
 #[entry]
 fn main() -> ! {
diff --git a/examples/panic.rs b/examples/panic.rs
index dfa88a79b28387aaa7f3c507443da1b78bc0916a..0daecf5264e353403a9cbae3a320090289fc98f5 100644
--- a/examples/panic.rs
+++ b/examples/panic.rs
@@ -21,6 +21,7 @@
 use panic_itm as _;
 
 use cortex_m_rt::entry;
+use stm32f4 as _;
 
 #[entry]
 fn main() -> ! {
diff --git a/openocd.cfg b/openocd.cfg
index 81551c81a5ce6d161e3f3ca8ec562db4db1cc274..1c082fe51c8ec2d4641dd92be4071ac6a4c2bcaa 100644
--- a/openocd.cfg
+++ b/openocd.cfg
@@ -4,9 +4,11 @@
 # interfaces. At any time only one interface should be commented out.
 
 # Revision C (newer revision)
-source [find interface/stlink-v2-1.cfg]
+source [find interface/stlink.cfg]
+# If you don't have that, use the deprecated
+# source [find interface/stlink-v2-1.cfg]
 
 # Revision A and B (older revisions)
 # source [find interface/stlink-v2.cfg]
 
-source [find target/stm32f3x.cfg]
+source [find target/stm32f4x.cfg]
diff --git a/openocd.gdb b/openocd.gdb
index 7795319fb66ecd2815ca8538ca52248646bdcee6..918dff9a0af41e51057d4a16a4958c9459ab4ee0 100644
--- a/openocd.gdb
+++ b/openocd.gdb
@@ -24,7 +24,7 @@ monitor arm semihosting enable
 # # send captured ITM to the file itm.fifo
 # # (the microcontroller SWO pin must be connected to the programmer SWO pin)
 # # 8000000 must match the core clock frequency
-# monitor tpiu config internal itm.txt uart off 8000000
+monitor tpiu config internal itm.txt uart off 16000000
 
 # # OR: make the microcontroller SWO pin output compatible with UART (8N1)
 # # 8000000 must match the core clock frequency