diff --git a/examples/bare4.rs b/examples/bare4.rs
index ea704536050ad42b0777979216cc753e4775e15d..7ccfa775d6c44b66066558ae65842e22b1c59ed2 100644
--- a/examples/bare4.rs
+++ b/examples/bare4.rs
@@ -36,8 +36,8 @@ use address::*;
 
 #[inline(always)]
 fn read_u32(addr: u32) -> u32 {
-    // unsafe { core::ptr::read_volatile(addr as *const _) }
-    core::ptr::read_volatile(addr as *const _)
+    unsafe { core::ptr::read_volatile(addr as *const _) }
+    // core::ptr::read_volatile(addr as *const _)
 }
 
 #[inline(always)]
@@ -55,13 +55,15 @@ fn wait(i: u32) {
 
 #[entry]
 fn main() -> ! {
+    // configure PA5 as output
+    let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask
+    write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode
+
     // power on GPIOA
     let r = read_u32(RCC_AHB1ENR); // read
     write_u32(RCC_AHB1ENR, r | 1); // set enable
 
-    // configure PA5 as output
-    let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask
-    write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode
+    
 
     // and alter the data output through the BSRR register
     // this is more efficient as the read register is not needed.