From 42377ea61e55cf0830571eaee5c5d686dc80fbf8 Mon Sep 17 00:00:00 2001
From: Ridgep <ridpet-5@student.ltu.se>
Date: Sat, 9 Mar 2019 14:58:53 +0100
Subject: [PATCH] bare5_1

---
 examples/bare4.rs | 16 ++++++++--------
 examples/bare5.rs |  8 ++++----
 2 files changed, 12 insertions(+), 12 deletions(-)

diff --git a/examples/bare4.rs b/examples/bare4.rs
index 7ccfa77..b174a2e 100644
--- a/examples/bare4.rs
+++ b/examples/bare4.rs
@@ -55,15 +55,13 @@ fn wait(i: u32) {
 
 #[entry]
 fn main() -> ! {
-    // configure PA5 as output
-    let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask
-    write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode
-
     // power on GPIOA
     let r = read_u32(RCC_AHB1ENR); // read
     write_u32(RCC_AHB1ENR, r | 1); // set enable
 
-    
+    // configure PA5 as output
+    let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask
+    write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode
 
     // and alter the data output through the BSRR register
     // this is more efficient as the read register is not needed.
@@ -124,16 +122,18 @@ fn main() -> ! {
 //
 //    Why is it important that ordering of volatile operations are ensured by the compiler?
 //
-//    ** your answer here **
+//    Some operations have to be executed in a specific order or the code will not act as it's desired.
+//    Dependencies might also be affected by the order of code.
 //
 //    Give an example in the above code, where reordering might make things go horribly wrong
 //    (hint, accessing a peripheral not being powered...)
 //
-//    ** your answer here **
+//    Example is changing the configure of PA5 and putting it before the power on GPIO
+//    resulting in the LED not blinking.
 //
 //    Without the non-reording proprety of `write_volatile/read_volatile` could that happen in theory
 //    (argue from the point of data dependencies).
 //
-//    ** your answer here **
+//    If we read/write in the wrong order, we'd end up getting unexpected results, which obviously isn't good.
 //
 //    Commit your answers (bare4_3)
diff --git a/examples/bare5.rs b/examples/bare5.rs
index 96f9f81..be4f637 100644
--- a/examples/bare5.rs
+++ b/examples/bare5.rs
@@ -186,14 +186,14 @@ fn idle(rcc: &mut RCC, gpioa: &mut GPIOA) {
 
     loop {
         // set PA5 high
-        gpioa.BSRRH.write(1 << 5); // set bit, output hight (turn on led)
-        // gpioa.ODR.write(gpioa.ODR.read() | (1 << 5));
+        // gpioa.BSRRH.write(1 << 5); // set bit, output hight (turn on led)
+        gpioa.ODR.write(gpioa.ODR.read() | (1 << 5));
 
         wait(10_000);
 
         // set PA5 low
-        gpioa.BSRRL.write(1 << 5); // clear bit, output low (turn off led)
-        // gpioa.ODR.write(gpioa.ODR.read() & !(1 << 5));
+        // gpioa.BSRRL.write(1 << 5); // clear bit, output low (turn off led)
+        gpioa.ODR.write(gpioa.ODR.read() & !(1 << 5));
         wait(10_000);
     }
 }
-- 
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