From a38bdbcd84ab393c4c2f3d2e2dce1f74a14c1dc4 Mon Sep 17 00:00:00 2001
From: Tommy Andersson <klomega89@gmail.com>
Date: Fri, 12 Mar 2021 10:17:23 +0000
Subject: [PATCH] Update rtic_bare6.rs
---
examples/rtic_bare6.rs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/examples/rtic_bare6.rs b/examples/rtic_bare6.rs
index 11d58fc..3e1188e 100644
--- a/examples/rtic_bare6.rs
+++ b/examples/rtic_bare6.rs
@@ -211,7 +211,7 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
//
// `rcc.cfgr.sysclk(84.mhz()).pclk1(42.mhz()).pclk2(64.mhz()).freeze();`
//
-// ** your answer here **
+// This should not be a problem, since the frequency is in range and they are valied numbers.
//
// Start `stm32cubemx` and select or create a project targeting stm32f401.
// Go to the graphical clock configuration view.
--
GitLab