diff --git a/examples/rtic_bare6.rs b/examples/rtic_bare6.rs
index 3c2ec1b102f0b7fc3853983a7d92fe4588afbfb3..ebcdc2b44cd563124c245a596db6b17dc021bdc3 100644
--- a/examples/rtic_bare6.rs
+++ b/examples/rtic_bare6.rs
@@ -49,7 +49,7 @@ const APP: () = {
         // power on GPIOA, RM0368 6.3.11
         device.RCC.ahb1enr.modify(|_, w| w.gpioaen().set_bit());
         // configure PA5 as output, RM0368 8.4.1
-        device.GPIOA.moder.modify(|_, w| w.moder5().bits(1));
+        device.GPIOA.moder.modify(|_, w| w.moder5().output());
 
         clock_out(&device.RCC, &device.GPIOC);
 
@@ -122,7 +122,7 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
     // mco2 	: SYSCLK = 0b00
     // mcopre 	: divide by 4 = 0b110
     rcc.cfgr
-        .modify(|_, w| unsafe { w.mco2().bits(0b00).mco2pre().bits(0b110) });
+        .modify(|_, w| unsafe { w.mco2().sysclk().mco2pre().div4() });
 
     // power on GPIOC, RM0368 6.3.11
     rcc.ahb1enr.modify(|_, w| w.gpiocen().set_bit());
@@ -132,12 +132,12 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
     // AF0, gpioc reset value = AF0
 
     // configure PC9 as alternate function 0b10, RM0368 6.2.10
-    gpioc.moder.modify(|_, w| w.moder9().bits(0b10));
+    gpioc.moder.modify(|_, w| w.moder9().alternate());
 
     // otyper reset state push/pull, in reset state (don't need to change)
 
     // ospeedr 0b11 = very high speed
-    gpioc.ospeedr.modify(|_, w| w.ospeedr9().bits(0b11));
+    gpioc.ospeedr.modify(|_, w| w.ospeedr9().high_speed());
 }
 
 // 0. Background reading:
@@ -305,7 +305,7 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
 //
 //    To view the API you can generate documentation for your crate:
 //
-//    > cargo doc --open
+//    > cargo doc --openc
 //
 //    By searching for `mco2` you find the enumerations and functions.
 //    So here