From b270c7dc3535547cf02c013c265a3dcfa133b721 Mon Sep 17 00:00:00 2001
From: "henthe-5@student.ltu.se" <henthe-5@student.ltu.se>
Date: Thu, 21 Feb 2019 16:34:58 +0100
Subject: [PATCH] bare4_1
---
examples/bare4.rs | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/examples/bare4.rs b/examples/bare4.rs
index 75fec4e..bdfd2f7 100644
--- a/examples/bare4.rs
+++ b/examples/bare4.rs
@@ -22,9 +22,12 @@ mod address {
pub const PERIPH_BASE: u32 = 0x40000000;
pub const AHB1PERIPH_BASE: u32 = PERIPH_BASE + 0x00020000;
pub const RCC_BASE: u32 = AHB1PERIPH_BASE + 0x3800;
+ // 6.3.11
pub const RCC_AHB1ENR: u32 = RCC_BASE + 0x30;
pub const GBPIA_BASE: u32 = AHB1PERIPH_BASE + 0x0000;
+ // 8.4.1
pub const GPIOA_MODER: u32 = GBPIA_BASE + 0x00;
+ // 8.4.7
pub const GPIOA_BSRR: u32 = GBPIA_BASE + 0x18;
}
@@ -56,10 +59,12 @@ fn wait(i: u32) {
#[entry]
fn main() -> ! {
// power on GPIOA
+ // 6.3.11
let r = read_u32(RCC_AHB1ENR); // read
write_u32(RCC_AHB1ENR, r | 1); // set enable
// configure PA5 as output
+ // 8.4.1
let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask
write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode
@@ -68,10 +73,12 @@ fn main() -> ! {
loop {
// set PA5 high
+ // 8.4.7
write_u32(GPIOA_BSRR, 1 << 5); // set bit, output hight (turn on led)
wait(10_000);
// set PA5 low
+ // 8.4.7
write_u32(GPIOA_BSRR, 1 << (5 + 16)); // clear bit, output low (turn off led)
wait(10_000);
}
@@ -84,7 +91,7 @@ fn main() -> ! {
//
// 1. Did you enjoy the blinking?
//
-// ** your answer here **
+// ** Yes **
//
// Now lookup the data-sheets, and read each section referred,
// 6.3.11, 8.4.1, 8.4.7
--
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