From 445341846eac78b98dfe47c80c624e594d44475b Mon Sep 17 00:00:00 2001
From: Anton <anton.frappe@outlook.com>
Date: Thu, 11 Mar 2021 11:22:05 +0100
Subject: [PATCH] bare6_1
---
examples/rtic_bare6.rs | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/examples/rtic_bare6.rs b/examples/rtic_bare6.rs
index 255ff36..5458a91 100644
--- a/examples/rtic_bare6.rs
+++ b/examples/rtic_bare6.rs
@@ -202,7 +202,7 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
//
// `rcc.cfgr.sysclk(64.mhz()).pclk1(64.mhz()).pclk2(64.mhz()).freeze()`;
//
-// ** your answer here **
+// PCLK1 needs to have a clock frequency of <= 42 MHz
//
// `rcc.cfgr.sysclk(84.mhz()).pclk1(42.mhz()).pclk2(64.mhz()).freeze();`
//
@@ -237,15 +237,15 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
//
// What is the (default) MCU (SYSCLK) frequency?
//
-// ** your answer here **
+// 8 Mhz
//
// What is the (default) DWT CYCCNT frequency?
//
-// ** your answer here **
+// Same as SYSCLK?
//
// What is the frequency of blinking?
//
-// ** your answer here **
+// 1 hz
//
// Commit your answers (bare6_1)
//
--
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