From 17d6b71cfacf65c153c612016a52b1503b93be32 Mon Sep 17 00:00:00 2001
From: Anton <anton.frappe@outlook.com>
Date: Wed, 3 Mar 2021 17:44:24 +0100
Subject: [PATCH] bare4_1
---
examples/rtic_bare4.rs | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/examples/rtic_bare4.rs b/examples/rtic_bare4.rs
index 1d53d13..6b4284b 100644
--- a/examples/rtic_bare4.rs
+++ b/examples/rtic_bare4.rs
@@ -58,22 +58,22 @@ const APP: () = {
fn init(_cx: init::Context) {
// power on GPIOA
let r = read_u32(RCC_AHB1ENR); // read
- write_u32(RCC_AHB1ENR, r | 1); // set enable
+ write_u32(RCC_AHB1ENR, r | 1); // set enable GPIOAEN, IOPort A clock
// configure PA5 as output
- let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask
- write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode
+ let r = read_u32(GPIOA_MODER) & !(0b11 << (5 * 2)); // read and mask, keep all values except MODER5, MODER5 = 00.
+ write_u32(GPIOA_MODER, r | 0b01 << (5 * 2)); // set output mode, set MODER5 to 01 = general purpose output mode.
// and alter the data output through the BSRR register
// this is more efficient as the read register is not needed.
loop {
// set PA5 high
- write_u32(GPIOA_BSRR, 1 << 5); // set bit, output hight (turn on led)
+ write_u32(GPIOA_BSRR, 1 << 5); // set bit, output hight (turn on led), sets the 5:th ODRx bit
wait(10_000);
// set PA5 low
- write_u32(GPIOA_BSRR, 1 << (5 + 16)); // clear bit, output low (turn off led)
+ write_u32(GPIOA_BSRR, 1 << (5 + 16)); // clear bit, output low (turn off led), resets the 5:th ODRx bit
wait(10_000);
}
}
@@ -83,7 +83,7 @@ const APP: () = {
//
// 1. Did you enjoy the blinking?
//
-// ** your answer here **
+// Yes, it is very nice.
//
// Now lookup the data-sheets, and read each section referred,
// 6.3.11, 8.4.1, 8.4.7
--
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