From 0eba1402d34b2bb36ab1061a6aeb94a5a831fe0c Mon Sep 17 00:00:00 2001
From: Anton <anton.frappe@outlook.com>
Date: Thu, 11 Mar 2021 11:59:46 +0100
Subject: [PATCH] bare6_5
---
examples/rtic_bare6.rs | 9 +++++----
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/examples/rtic_bare6.rs b/examples/rtic_bare6.rs
index e1fb2cb..10ab35e 100644
--- a/examples/rtic_bare6.rs
+++ b/examples/rtic_bare6.rs
@@ -122,22 +122,23 @@ fn clock_out(rcc: &RCC, gpioc: &GPIOC) {
// mco2 : SYSCLK = 0b00
// mcopre : divide by 4 = 0b110
rcc.cfgr
- .modify(|_, w| unsafe { w.mco2().bits(0b00).mco2pre().bits(0b110) });
+ .modify(|_, w| unsafe { w.mco2().sysclk().mco2pre().bits(0b110) });
+
// power on GPIOC, RM0368 6.3.11
- rcc.ahb1enr.modify(|_, w| w.gpiocen().set_bit());
+ rcc.ahb1enr.modify(|_, w| w.gpiocen().enabled());
// MCO_2 alternate function AF0, STM32F401xD STM32F401xE data sheet
// table 9
// AF0, gpioc reset value = AF0
// configure PC9 as alternate function 0b10, RM0368 6.2.10
- gpioc.moder.modify(|_, w| w.moder9().bits(0b10));
+ gpioc.moder.modify(|_, w| w.moder9().alternate());
// otyper reset state push/pull, in reset state (don't need to change)
// ospeedr 0b11 = very high speed
- gpioc.ospeedr.modify(|_, w| w.ospeedr9().bits(0b11));
+ gpioc.ospeedr.modify(|_, w| w.ospeedr9().very_high_speed());
}
// 0. Background reading:
--
GitLab